M16CSLASH29 datasheet(132/499 Pages) RENESAS

132 / 499 page

12. Timer A

page 108

Figure 12.8 TAiMR Register in Event Counter Mode (when not using two-phase pulse signal

processing)

Symbol

Address

After Reset

TA0MR to TA4MR

039616 to 039A16

0016

b7 b6 b5 b4 b3 b2 b1 b0

Operation mode select bit 0 1 : Event counter mode (1)

b1 b0

TMOD0

MR0

0: Pulse is not output

(TAiOUT pin functions as I/O port)

1: Pulse is output

(TAiOUT pin functions as pulse output pin)

MR2

MR1

MR3

Set to 0 in event counter mode

TCK0

Count operation type

select bit

0: Counts external signal's falling edge

1: Counts external signal's rising edge

Up/down switching

cause select bit

0: Reload type

1: Free-run type

Bit Symbol

Bit Name

Function

TCK1

Can be 0 or 1 when not using two-phase pulse signal processing

TMOD1

Timer Ai Mode Register (i=0 to 4)

(When not using two-phase pulse signal processing)

NOTES:

1. During event counter mode, the count source can be selected using registers ONSF and TRGSR.

2. Effective when bits TAiTGH and TAiTGL in the ONSF or TRGSR register are 002 (TAiIN pin input).

3. Decrement when input on TAiOUT pin is low or increment when input on that pin is high. The port

direction bit for TAiOUT pin must be set to 0 (input mode).

Pulse output function

select bit

Count polarityselect bit (2)

0: UDF register

1: Input signal to TAiOUT pin(3)

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