M16CSLASH29 datasheet(363/499 Pages) RENESAS

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20. Flash Memory Version

page 339

20.5 Register Description

Figure 20.6

shows the flash memory control register 0 and flash memory control register 1. Figure 20.7

shows the flash memory control register 4.

20.5.1 Flash Memory Control Register 0 (FMR0)

•FMR 00 Bit

The FMR00 bit indicates the operating state of the flash memory. Its value is 0 while the program,

erase, or erase-suspend command is being executed, otherwise, it is 1.

•FMR01 Bit

The MCU can accept commands when the FMR01 bit is set to 1 (CPU rewrite mode). To set the

FMR01 bit to 1, first set it to 0 and then 1. The FMR01 bit is set to 0 only by writing 0.

•FMR02 Bit

The combined settings of bits FMR02 and FMR16 enable program and erase in the user ROM area.

See Table 20.4 for setting details. To set the FMR02 bit to 1, first set it to 0 and then 1. The FMR02

bit is valid only when the FMR01 bit is set to 1 (CPU rewrite mode enable).

•FMSTP Bit

The FMSTP bit initializes the flash memory control circuits and minimizes power consumption in the

flash memory. Access to the on-chip flash memory is disabled when the FMSTP bit is set to 1. Set the

FMSTP bit by program in a space other than the flash memory.

Set the FMSTP bit to 1 if one of the following occurs:

•A flash memory access error occurs during erasing or programming in EW mode 0 (FMR00 bit does

not switch back to 1 (ready)).

•Low-power consumption mode or on-chip oscillator low-power consumption mode is entered.

Figure 20.10

shows a flow chart illustrating how to start and stop the flash memory before and after

entering low power mode. Follow the procedure in this flow chart.

When entering stop or wait mode while the CPU rewrite mode is disabled, do not set the FMR0

exiting.

•FMR06 Bit

The FMR06 bit is a read-only bit indicating an auto-program operation state. The FMR06 bit is set to

1 when a program error occurs; otherwise, it is set to 0. For details, refer to 20.8.4 Full Status Check.

•FMR07 Bit

The FMR07 bit is a read-only bit indicating an auto-erase operation status. The FMR07 bit is set to 1

when an erase error occurs; otherwise, it is set to 0. For details, refer to 20.8.4 Full Status Check.

Figure 20.8

shows a EW mode 0 set/reset flowchart, Figure 20.9 shows a EW mode 1 set/reset flow-

chart.

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