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M16C/29 датащи(PDF) 360 Page - Renesas Technology Corp |
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M16C/29 датащи(HTML) 360 Page - Renesas Technology Corp |
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360 / 499 page ![]() 20. Flash Memory Version p u o r G 9 2 / C 6 1 M page 336 8 5 4 f o 7 0 0 2 , 0 3 .r a M 2 1 . 1 . v e R 2 1 1 0 - 1 0 1 0 B 9 0 J E R Symbol Address Factory Setting ROMCP 0FFFFF16 FF16 (4) ROM Code Protect Control Address(5) Bit Name Function Bit Symbol b7 b6 b5 b4 b3 b2 b1 b0 00: 01: 10: 11: Disables protect ROM Code Protect Level 1 Set Bit (1, 2, 3, 4) ROMCP1 b7 b6 1 1 Reserved Bit Set to 1 Enables protect } NOTES: 1. When the ROM code protect is active by the ROMCP1 bit setting, the flash memory is protected against reading or rewriting in parallel I/O mode. 2. Set the bit 5 to bit 0 to 1111112 when the ROMCP1 bit is set to a value other than 112. When the bit 5 to bit 0 are set to values other than 1111112, the ROM code protection may not become active by setting the ROMCP1 bit to a value other than 112. 3. To make the ROM code protection inactive, erase a block including the ROMCP address in standard serial I/O mode or CPU rewrite mode. 4. The ROMCP address is set to FF16 when a block, including the ROMCP address, is erased. 5. When a value of the ROMCP address is 0016 or FF16, the ROM code protect function is disabled. 1 1 RW RW RW RW (b5-b0) Reset vector Watchdog timer vector Single step vector Address match vector BRK instruction vector Overflow vector Undefined instruction vector ID7 ID6 ID5 ID4 ID3 ID2 ID1 DBC vector NMI vector 0FFFFF16 to 0FFFFC16 0FFFFB16 to 0FFFF816 0FFFF716 to 0FFFF416 0FFFF316 to 0FFFF016 0FFFEF16 to 0FFFEC16 0FFFEB16 to 0FFFE816 0FFFE716 to 0FFFE416 0FFFE316 to 0FFFE016 0FFFDF16 to 0FFFDC16 4 bytes Address ROMCP Figure 20.4 ROMCP Address Figure 20.5 Address for ID Code Stored |
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