M16CSLASH29 datasheet(340/499 Pages) RENESAS

340 / 499 page

19. Programmable I/O Ports

page 316

19. Programmable I/O Ports

Note

Ports P04 to P07, P10 to P14 , P34 to P37 and P95 to P97 are not available in 64-pin package.

The programmable input/output ports (hereafter referred to simply as “I/O ports”) consist of 71 lines P0, P1,

P2, P3, P6, P7, P8, P9, P10 (except P94) for the 80-pin package, or 55 lines P00 to P03, P15 to P17, P2, P30

to P33, P6, P7, P8, P90 to P93, P10 for the 64-pin package. Each port can be set for input or output every

line by using a direction register, and can also be chosen to be or not be pulled high in sets of 4 lines.

Figures 19.1

to 19.4 show the I/O ports. Figure 19.5 shows the I/O pins.

Each pin functions as an I/O port, a peripheral function input/output.

For details on how to set peripheral functions, refer to each functional description in this manual. If any pin

is used as a peripheral function input, set the direction bit for that pin to 0 (input mode). Any pin used as an

output pin for peripheral functions is directed for output no matter how the corresponding direction bit is set.

19.1 Port Pi Direction Register (PDi Register, i = 0 to 3, 6 to 10)

Figure 19.6

shows the direction registers.

This register selects whether the I/O port is to be used for input or output. The bits in this register corre-

spond one for one to each port.

19.2 Port Pi Register (Pi Register, i = 0 to 3, 6 to 10)

Figure 19.7

shows the Pi registers.

Data input/output to and from external devices are accomplished by reading and writing to the Pi register.

The Pi register consists of a port latch to hold the output data and a circuit to read the pin status. For ports

set for input mode, the input level of the pin can be read by reading the corresponding Pi register, and data

can be written to the port latch by writing to the Pi register.

For ports set for output mode, the port latch can be read by reading the corresponding Pi register, and data

can be written to the port latch by writing to the Pi register. The data written to the port latch is output from

the pin. The bits in the Pi register correspond one for one to each port.

19.3 Pull-up Control Register 0 to 2 (PUR0 to PUR2 Registers)

Figure 19.8

shows registers PUR0 to PUR2.

Registers PUR0 to PUR2 select whether the pins, divided into groups of four pins, are pulled up or not. The

pins, selected by setting the bits in registers PUR0 to PUR2 to 1 (pull-up), are pulled up when the direction

registers are set to 0 (input mode). The pins are pulled up regardless of the pins’ function.

19.4 Port Control Register (PCR Register)

Figure 19.9

shows the port control register.

When the P1 register is read after setting the PCR0 bit in the PCR register to 1, the corresponding port latch

can be read no matter how the PD1 register is set.

M16C/29 датащи(PDF) 340 Page - Renesas Technology Corp