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M16C/29 датащи(PDF) 338 Page - Renesas Technology Corp |
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M16C/29 датащи(HTML) 338 Page - Renesas Technology Corp |
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338 / 499 page ![]() 18. CRC Calculation Circuit p u o r G 9 2 / C 6 1 M page 314 8 5 4 f o 7 0 0 2 , 0 3 .r a M 2 1 . 1 . v e R 2 1 1 0 - 1 0 1 0 B 9 0 J E R Figure 18.2. CRCD, CRCIN, CRCMR, CRCSAR Register Symbol Address After Reset CRCD 03BD16 to 03BC16 Undefined b7 b0 b7 b0 (b15) (b8) CRC Data Register Function Setting Range 000016 to FFFF16 RW RW Symbol Address After Reset CRCIN 03BE16 Undefined b7 b0 CRC Input Register Data input Function 0016 to FF16 RW RW Setting Range CRC calculation result output Symbol Address After Reset CRCMR 03B616 0XXXXXX02 b7 b0 CRC Mode Register CRC mode polynomial selection bit Function 0: LSB first 1: MSB first RW RW Bit name Bit symbol CRC mode selection bit CRCPS CRCMS RW Nothing is assigned. Write "0" when writing to this bit. The value is indeterminate if read. 0: X16+X12+X5+1 (CRC-CCITT) 1: X16+X15+X2+1 (CRC-16) CRC mode polynomial selection bit Function 0: LSB first 1: MSB first RW RW Bit Name Bit Symbol CRC mode selection bit CRCPS CRCMS RW Nothing is assigned. If necessary, set to 0. When read, the content is undefined 0: X16+X12+X5+1 (CRC-CCITT) 1: X16+X15+X2+1 (CRC-16) (b6-b1) Symbol Address After Reset CRCSAR 03B516 to 03B416 00XXXXXX XXXXXXXX2 b7 b0 b7 b0 (b15) (b8) SFR Snoop Address Register CRC mode polynomial selection bit Function RW RW Bit Name Bit Symbol CRCSR RW Nothing is assigned. If necessary, set to 0. When read, the content is undefined SFR address to snoop Function 0: Disabled 1: Enabled(1) RW CRCSW CRCSAR9-0 CRC snoop on read enable bit CRC snoop on write enable bit 0: Disabled 1: Enabled(1) RW (b13-b10) NOTE: 1. Set bits CRCSR and CRCSW to 0 if the PLC07 bit in the PLC0 register is set to 1 (PLL on) and the PM20 bit in the PM2 register is set to 0 (SFR access 2 wait). |
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