| поискавой системы для электроныых деталей |
|
4513 датащи(PDF) 23 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
4513 датащи(HTML) 23 Page - Renesas Technology Corp |
|
23 / 97 page ![]() 22 4513/4514 Group SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS (6) Interrupt control registers • Interrupt control register V1 Interrupt enable bits of external 0, external 1, timer 1 and timer 2 are assigned to register V1. Set the contents of this register through register A with the TV1A instruction. The TAV1 instruction can be used to transfer the contents of register V1 to register A. • Interrupt control register V2 Interrupt enable bits of timer 3, timer 4, A-D and serial I/O are as- signed to register V2. Set the contents of this register through register A with the TV2A instruction. The TAV2 instruction can be used to transfer the contents of register V2 to register A. Table 6 Interrupt control registers V13 V12 V11 V10 V23 V22 V21 V20 Serial I/O interrupt enable bit A-D interrupt enable bit Timer 4 interrupt enable bit Timer 3 interrupt enable bit Interrupt control register V1 Timer 2 interrupt enable bit Timer 1 interrupt enable bit External 1 interrupt enable bit External 0 interrupt enable bit Note: “R” represents read enabled, and “W” represents write enabled. Interrupt disabled (SNZT2 instruction is valid) Interrupt enabled (SNZT2 instruction is invalid) Interrupt disabled (SNZT1 instruction is valid) Interrupt enabled (SNZT1 instruction is invalid) Interrupt disabled (SNZ1 instruction is valid) Interrupt enabled (SNZ1 instruction is invalid) Interrupt disabled (SNZ0 instruction is valid) Interrupt enabled (SNZ0 instruction is invalid) Interrupt disabled (SNZSI instruction is valid) Interrupt enabled (SNZSI instruction is invalid) Interrupt disabled (SNZAD instruction is valid) Interrupt enabled (SNZAD instruction is invalid) Interrupt disabled (SNZT4 instruction is valid) Interrupt enabled (SNZT4 instruction is invalid) Interrupt disabled (SNZT3 instruction is valid) Interrupt enabled (SNZT3 instruction is invalid) 0 1 0 1 0 1 0 1 R/W at RAM back-up : 00002 at reset : 00002 R/W at RAM back-up : 00002 at reset : 00002 Interrupt control register V2 R/W at RAM back-up : 00002 at reset : 00002 0 1 0 1 0 1 0 1 |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |