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4513 датащи(PDF) 14 Page - Renesas Technology Corp |
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4513 датащи(HTML) 14 Page - Renesas Technology Corp |
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14 / 97 page ![]() 4513/4514 Group SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER MITSUBISHI MICROCOMPUTERS 13 PORT BLOCK DIAGRAMS (continued) P50–P53 D T Q OP5A instruction Ai Register A IAP5 instruction D0–D5 SD instruction S R Q Decoder Skip decision (SZD instruction) Register Y RD instruction D6/CNTR0 S R Q Skip decision (SZD instruction) SD instruction Decoder Register Y RD instruction 0 1 W60 Timer 1 underflow signal divided by 2 or signal of AND operation between timer 1 underflow signal divided by 2 and timer 2 underflow signal divided by 2 Clock input for timer 2 event count D7/CNTR1 S R Q 0 1 W62 Direction register FR0i Skip decision (SZD instruction) SD instruction Decoder Register Y RD instruction Clock input for timer 4 event count This symbol represents a parasitic diode on the port. • Applied potential to ports D0–D7 must be 12 V. • i represents 0, 1, 2, or 3. • The 4513 Group does not have port P5. • CLD instruction Timer 3 underflow signal divided by 2 or signal of AND operation between timer 3 underflow signal divided by 2 and timer 4 underflow signal divided by 2 CLD instruction CLD instruction |
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