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M306V2EEFS датащи(PDF) 144 Page - Renesas Technology Corp

номер детали M306V2EEFS
подробное описание детали  SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
PDF  271 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M306V2EEFS датащи(HTML) 144 Page - Renesas Technology Corp

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Rev.1.40
Oct 06, 2004 page 144 of 269
M306V2ME-XXXFP, M306V2EEFP
Standard Clock Mode
High-speed Clock Mode
6.5
µs (65 cycles) < SCL release time
1.0
µs (10 cycles) < SCL release time
3.25
µs (32.5 cycles) < Setup time
0.5
µs (5 cycles) < Setup time
3.25
µs (32.5 cycles) < Hold time
0.5
µs (5 cycles) < Hold time
(9) START/STOP condition detect conditions
The START/STOP condition detect conditions are shown in Figure 2.11.44 and Table 2.11.14. Only
when the 3 conditions of Table 2.11.14 are satisfied, a START/STOP condition can be detected.
Note: When a STOP condition is detected in the slave mode (MST = 0), an interrupt request signal
<IICIRQ> is generated to the CPU.
Fig. 2.11.44 START condition/STOP condition detect timing diagram
Table 2.11.14 START condition/STOP condition detect conditions
Note: Absolute time at BCLK = 10 MHz. The value in parentheses denotes the number of BCLK cycles.
Hold time
Setup
time
SCL
SDA
(START condition)
SDA
(STOP condition)
SCL release time
Hold time
Setup
time



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