M306V2EEFS datasheet(142/271 Pages) RENESAS

142 / 271 page

Rev.1.40

Oct 06, 2004 page 142 of 269

M306V2ME-XXXFP, M306V2EEFP

s Bit 7: Communication mode specification bit (master/slave specification bit: MST)

This bit is used for master/slave specification for data communication. When this bit is “0,” the slave is

specified, so that a START condition and a STOP condition generated by the master are received,

and data communication is performed in synchronization with the clock generated by the master.

When this bit is “1,” the master is specified and a START condition and a STOP condition are gener-

ated, and also the clocks required for data communication are generated on the SCL.

The MST bit is cleared to “0” in one of the following conditions.

• Immediately after completion of 1-byte data transmission when arbitration lost is detected

• When a STOP condition is detected.

• When occurence of a START condition is disabled by the START condition duplication preventing

function (See note).

• At reset

Note: The START condition duplication prevention function disables the following: the START condi-

tion generation; bit counter reset, and SCL output with the generation. This bit is valid from

setting of BB flag to the completion of 1-byte transmittion/reception (occurrence of transmission/

reception interrupt request) <IICIRQ>.

Fig. 2.11.40 I2Ci status register (i = 0, 1)

Fig. 2.11.41 Interrupt request signal generation timing

I2Ci status register (i = 0, 1)

b7 b6 b5 b4 b3 b2 b1 b0

Symbol

Address

When reset

IIC0S1

02E216

0001000?2

IIC1S1

02EA16

0001000?2

LRB

Last receive bit

General call detecting

flag (See note)

0 : Last bit = “0”

1 : Last bit = “1”

(See note 1)

0 : No general call detected

1 : General call detected

(See note 1)

Slave address comparison

flag (See note)

0 : Address mismatch

1 : Address match

(See note 1)

0 : Not detected

1 : Detected

(See note 1)

AD0

AAS

Arbitration lost detecting

flag (See note)

0 : Interrupt request issued

1 : No interrupt request issued (See note 2)

2C-BUS interface i

interrupt request bit

b7b6

0 0 : Slave receive mode

0 1 : Slave transmit mode

1 0 : Master receive mode

1 1 : Master transmit mode

0 : Bus free

1 : Bus busy

(See note 1)

Bus busy flag

Notes 1: These bits and flags can be read out, but cannot be written.

2: This bit can be written only “1.”

Communication mode

specification bits

TRX

MST

Bit Symbol

Bit name

Function

R W

SCL

IICIRQ

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