M306V2EEFS datasheet(148/271 Pages) RENESAS

148 / 271 page

Rev.1.40

Oct 06, 2004 page 148 of 269

M306V2ME-XXXFP, M306V2EEFP

s START condition generating procedure using multi-master

FCLR

(Interrupt disabled)

BTST

5, IICiS1

(BB flag confirming and branch process)

BUSBUSY

BUSFREE:

MOV.B

SA, IICiS0

(Writing of slave address value <SA>)

NOP

MOV.B

#F0H, IICiS1

(Trigger of START condition generating)

FSET

(Interrupt enabled)

BUSBUSY:

FSETI

(Interrupt enabled)

➀ Be sure to add NOP instruction ✕ 2 between writing the slave address value and setting trigger of

START condition generating shown the above procedure example.

➁ When using multi-master system, disable interrupts during the following three process steps:

• BB flag confirming

• Writing of slave address value

• Trigger of START condition generating

When the condition of the BB flag is bus busy, enable interrupts immediately.

When using single-master system, it is not necessary to disable interrupts above.

s RESTART condition generating procedure

MOV.B

SA, IICiS0S

(Writing of slave address value <SA>)

NOP

MOV.B

#F0H, IICiS1

(Trigger of RESTART condition generating)

➀ Use the I2Ci transmit buffer register to write the slave address value to the I2Ci data shift register.

And also, be sure to add NOP instruction ✕ 2.

s Writing to I2Ci status register

Do not execute an instruction to set the PIN bit to “1” from “0” and an instruction to set the MST and

TRX bits to “0” from “1” simultaneously. It is because it may enter the state that the SCL pin is released

and the SDA pin is released after about one machine cycle. Do not execute an instruction to set the

MST and TRX bits to “0” from “1” simultaneously when the PIN bit is “1.” It is because it may become

the same as above.

s Process of after STOP condition generating

Do not write data in the I2Ci data shift register (IICiS0) and the I2Ci status register (IICiS1) until the bus

busy flag BB becomes “0” after generating the STOP condition in the master mode. It is because the

STOP condition waveform might not be normally generated. Reading to the above registers do not have

the problem.

➀

➁

➀

M306V2EEFS датащи(PDF) 148 Page - Renesas Technology Corp

M306V2EEFS датащи(HTML) 148 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL