PM6681ATR datasheet(42/47 Pages) STMICROELECTRONICS

42 / 47 page

Layout guidelines

PM6681A

42/47

Layout guidelines

The layout is very important in terms of efficiency, stability and noise of the system. It is

possible to refer to the PM6681A demonstration board for a complete layout example.

For good PC board layout follows these guidelines:

●

Place on the top side all the power components (inductors, input and output capacitors,

MOSFETs and diodes). Refer them to a power ground plan, PGND. If possible, reserve

a layer to PGND plan. The PGND plan is the same for both the switching sections.

●

AC current paths layout is very critical (see Figure 44). The first priority is to minimize

their length. Trace the LS MOSFET connection to PGND plan (with or without current

sense resistor RSENSE) as short as possible. Place the synchronous diode D near the

LS MOSFET. Connect the LS MOSFET drain to the switching node with a short trace.

●

Place input capacitors near HS MOSFET drain. It is recommended to use the same

input voltage plan for both the switching sections, in order to put together all input

capacitors.

●

Place all the sensitive analog signals (feedbacks, voltage reference and current sense

paths) on the bottom side of the board or in an inner layer. Isolate them from the power

top side with a signal ground layer, SGND. Connect the SGND and PGND plans only in

one point (a multiple via connection is preferable to a 0 ohm resistor connection) near

the PGND device pin. Place the device on the top or on the bottom size and connect

the exposed pad and the SGND pins to the SGND plan (see Figure 44).

Figure 44.

Current paths, ground connection and driver traces layout

PM6681ATR датащи(PDF) 42 Page - STMicroelectronics