PM6681ATR datasheet(21/47 Pages) STMICROELECTRONICS

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PM6681A

Device description

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Figure 32.

Circuitry for output ripple compensation

The integrator amplifier generates a current, proportional to the DC errors between the FB

voltage and Vr, which decreases the output voltage in order to compensate the total static

error, including the voltage drop on PCB traces. In addition, CINT provides an AC path for

the output ripple. In steady state, the voltage on COMP1/COMP2 pin is the sum of the

reference voltage Vr and the output ripple (see Figure 32). In fact when the voltage on the

COMP pin reaches Vr, a fixed Ton begins and the output increases.

For example, we consider Vout = 5 V with an output ripple of

∆V = 50 mV. Considering C

INT

>> CFILT, the CINT DC voltage drop VCINT is about 5 V - Vr + 25 mV = 4.125 V.

CINT assures an AC path for the output voltage ripple. Then the COMP pin ripple is a replica

of the output ripple, with a DC value of Vr + 25 mV = 925 mV.

For more details about the output ripple compensation network, see the paragraph “Closing

the integrator loop” in the design guidelines.

In steady state the FB pin voltage is about Vr and the regulated output voltage depends on

the external divider:

Equation 4

7.4

Pulse skip mode

If the SKIP pin is tied to ground, the device works in skip mode.

At light loads a zero-crossing comparator truncates the low-side switch on-time when the

inductor current becomes negative. In this condition the section works in discontinuous

conduction mode. The threshold between continuous and discontinuous conduction mode

is:

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OUT

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