ST52F510 datasheet(17/106 Pages) STMICROELECTRONICS

17 / 106 page

ST52F510/F513/F514

17/106

2 INTERNAL ARCHITECTURE

ST52F510/F513/F514’s architecture is Register

File based and is composed of the following blocks

and peripherals:

Control Unit (CU)

Data Processing Unit (DPU)

Decision Processor (DP)

ALU

Memory Interface

up to 256 bytes Register File

Program/Data Memory

Data EEPROM

Interrupts Controller

Clock Oscillator

PLVD and POR

Digital I/O ports

Analog Multiplexer and A/D Converter

Timer/PWMs

I2C

SPI

SCI

Figure 2.1 CU Block Diagram

2.1 Control Unit and Data Processing Unit

The Control Unit (CU) decodes the instructions

stored in the Program Memory and generates the

appropriate control signals. The main parts of the

CU are illustrated in Figure 2.1.

The five different parts of the CU manage Loading,

Logic/Arithmetic, Jump, Control and the Fuzzy

instruction set.

The block called “Collector” manages the signals

deriving from the different parts of the CU. The

collector

defines

the

signals

for

the

Data

Processing Unit (DPU) and Decision Processor

(DP), as well as for the different peripherals of the

ICU.

The block called “Arbiter” manages the different

parts of the CU, so that only one part of the system

is activated during working mode.

The CU structure is extremely flexible and was

designed with the purpose of easily adapting the

core of the microcontroller to market needs. New

instruction sets or new peripherals can easily be

included without changing the structure of the

microcontroller, maintaining code compatibility.

A set of 107 different instructions is available. Each

instruction requires a number of clock pulses to be

performed that depends on the complexity of the

instruction itself. The clock pulses to execute the

instructions are driven directly by the masterclock,

which has the same frequency of the oscillator

signal supplied.

Instruction Set

Logic Arithmetic

Instruction Set

Jump

Instruction Set

Control

Instruction Set

Decision Processor

Instruction Set

Control

Signals

MicroCode

Clock Master

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