ST52F510 datasheet(90/106 Pages) STMICROELECTRONICS

90 / 106 page

ST52F510/F513/F514

90/106

Figure 14.3 Tranfer Sequencing

7-bit Slave receiver:

7-bit Slave transmitter:

7-bit Master receiver:

7-bit Master transmitter:

10-bit Slave receiver:

10-bit Slave transmitter:

10-bit Master transmitter:

10-bit Master receiver:

Legend:

S=Start, P=Stop, A=Acknowledge, NA=Non-acknowledge

EVx=Event (with interrupt if ITE=1)

EV1: EVF=1, ADSL=1, cleared by reading I2C_SR1 register.

EV2: EVF=1, BTF=1, cleared by reading I2C_SR1 register followed by reading I2C_IN register.

EV3: EVF=1, BTF=1, cleared by reading I2C_SR1 register followed by writing I2C_OUT register.

EV3-1: EVF=1, AF=1, BTF=1, SCL=0; AF is cleared by reading I2C_SR2. BTF is cleared

by releasing the lines (STOP=1,STOP=0) or by readyng I2C_SR1 and writing I2C_OUT register

(I2C_OUT=FFh).Note: If lines are released by STOP=1, STOP=0, the subsequent EV4 is not seen

EV4: EVF=1, STOPF=1, cleared by reading I2C_SR2 register.

EV5: EVF=1, SB=1, cleared by reading I2C_SR1 register followed by writing I2C_OUT register.

EV6: EVF=1, cleared by reading I2C_SR1 register followed by writing I2C_CR (for example PE=1

EV7: EVF=1, BTF=1, cleared by reading I2C_SR1 register followed by reading I2C_IIN register.

EV8: EVF=1, BTF=1, cleared by reading I2C_SR1 register followed by writing I2C_OUT register.

EV9: EVF=1, ADD10=1, cleared by reading I2C_SR1 register followed by writing I2C_OUT registe

S Address A

Data1

Data2

.....

DataN

EV1

EV2

EV4

S Address A

Data1

Data2

.....

DataN

EV1 EV3

EV3

EV3-1

EV4

Address

Data1

Data2

.....

DataN

EV5

EV6

EV7

Address

Data1

Data2

.....

DataN

EV5

EV6 EV8

EV8

S Header

Address A

Data1

.....

DataN

EV1

EV2

EV4

Sr Header

Data1

.....

DataN

EV1 EV3

EV3

EV3-1

EV4

Header

Address A

Data1

.....

DataN

EV5

EV9

EV6 EV8

EV8

Header

Data1

.....

DataN

EV5

EV6

EV7

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