WM8580 datasheet(55/103 Pages) WOLFSON

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Production Data

WM8580

PD Rev 4.5 February 2008

•

PLL User Mode (Selected if S/PDIF Receiver Disabled)

In user mode, the user has full control over the function and operation of both PLLA and PLLB. In

this mode, the user can accurately specify the PLL N and K multiplier values and the pre and post-

scale divider values and can hence fully control the generated clock frequencies.

Refer to Table 47 and Table 49 for details of the registers available for configuration in this mode.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

PLLA 1/

DEVID1

00h

8:0

PLLA_K[8:0]

100100001

PLLA 2/

DEVID2

01h

8:0

PLLA_K[17:9]

101111110

3:0

PLLA_K[21:18]

1101

Fractional (K) part of PLLA

frequency ratio II .

Value K is one 22-digit binary

number spread over registers R0,

R1 and R2 as shown.

PLLA 3/

DEVREV

02h

7:4

PLLA_N[3:0]

0111

Integer (N) part of PLLA frequency

ratio. I

Use values in the range 5 ≤ PLLA_N

≤ 13 as close as possible to 8

PLLB 1

04h

8:0

PLLB_K[8:0]

100100001

PLLB 2

05h

8:0

PLLB_K[17:9]

101111110

3:0

PLLB_K[21:18]

1101

Fractional (K) part of PLLB

frequency ratio I.

Value K is one 22-digit binary

number spread over registers R4,

R5 and R6 as shown.

Note: PLLB_K must be set to

specific values when the S/PDIF

receiver is used. Refer to S/PDIF

Receive Mode Clocking section

for details.

PLLB 3

06h

7:4

PLLB_N[3:0]

0111

Integer (N) part of PLLB frequency

rat atioII(R).

Use values in the range 5 ≤ PLLB_N

≤ 13 as close as possible to 8

Note: PLLB_N must be set to

specific values when the S/PDIF

receiver is used. Refer to S/PDIF

Receive Mode Clocking section

for details.

Table 47 User Mode PLL_K and PLL_N Multiplier Control

PARAMETER

PLL USER

MODE

PLL S/PDIF RECEIVER MODE

PRESCALE_A

Manual

Write PRESCALE_B Value

PRESCALE_B

Manual

Configure Specified PLLB Frequency

PLLA_N

Manual

Automatically Controlled

PLLA_K

Manual

Automatically Controlled

PLLB_N

Manual

Configure Specified PLLB Frequency

PLLB_K

Manual

Configure Specified PLLB Frequency

FREQMODE_A

Manual

Automatically Controlled

FREQMODE_B

Manual

Not Used

POSTSCALE_A

Manual

256fs/128fs PLLACLK Select

POSTSCALE_B

Manual

Not Used

Table 48 PLL Control Register Function in PLL User and PLL S/PDIF Receiver Modes

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