RX72N datasheet(87/179 Pages) RENESAS

87 / 179 page

R01DS0343EJ0120 Rev.1.20

Page 87 of 179

Nov 15, 2023

RX72N Group

2. Electrical Characteristics

ICC typ. = 0.50 × f + 3.7 (ICLK 1 MHz max) (low-speed operating mode 1)

ICC max. = 0.13 × f + 113 (sleep mode)

 G version

ICC max. = 0.65 × f + 164 (full operation in high-speed operating mode)

ICC typ. = 0.22 × f + 7 (normal operation in high-speed operating mode)

ICC typ. = 0.50 × f + 3.7 (ICLK 1 MHz max) (low-speed operating mode 1)

ICC max. = 0.13 × f + 164 (sleep mode)

Note 4. Whether the peripheral module clocks are supplied or stopped is controlled only by the bit settings in the module stop control

registers A to D.

Note 5. When the peripheral module clock is stopped, the settings of the clock frequency are as follows:

ICLK = 240 MHz and PCLKA = PCLKB = PCLKC = PCLKD = FCLK = BCLK = BCLK pin = 3.75 MHz (divided by 64).

Note 6. When the low power consumption function is disabled, the DEEPCUT[1:0] bits are set to 01b.

Note 7. When the low power consumption function is enabled, the DEEPCUT[1:0] bits are set to 11b.

Note 8. These are the increases during programming of the code flash memory after the code flash memory (limitations apply to the

combinations of address ranges of the program area and the readable area) or the data flash memory has been programmed or

erased.

Note 9. Reference value

Note 1. The reference power supply current is included in the power supply current value for 12-bit A/D converter (unit 1) and D/A

converter.

Note 2. This applies when VBATT is used.

Note 3. Supply current values are measured when all output pins are unloaded.

Table 2.7

DC Characteristics (4)

Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = 2.7 to 3.6 V, 2.7 V ≤ VREFH0 ≤ AVCC0,

VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = 0 V,

Ta = Topr

Item

Symbol

D version

G version

Unit

Test Conditions

Min.

Typ.

Max.

Min.

Typ.

Max.

Analog

power

supply

current*1, *3

During 12-bit A/D conversion (unit 0)

AICC

—

0.8

—

0.8

IAVCC0_AD

During 12-bit A/D conversion (unit 0)

with channel-dedicated sample-and-

hold circuits (3 channels)

—

1.7

2.5

—

1.7

2.5

IAVCC0_AD + SH

During 12-bit A/D conversion (unit 1)

—

0.6

—

0.6

IAVCC1_AD

During 12-bit A/D conversion (unit 1)

+ temperature sensor

—

0.7

1.1

—

0.7

1.1

IAVCC1_AD +

TEMP

During D/A

conversion

(2 channels)

Unbuffered output

—

0.25

0.4

—

0.25

0.4

IAVCC1_DA

Buffered output

—

0.75

1.1

—

0.75

1.1

Waiting for A/D, D/A, and

temperature sensor conversion

(all units)

—

0.9

1.4

—

0.9

1.4

IAVCC0 +

IAVCC1

A/D, D/A, and temperature sensor

are in standby mode (all units)

—

1.4

6.7

—

1.4

9.0

µA

IAVCC0 +

IAVCC1

Reference

power

supply

current

During 12-bit A/D conversion (unit 0)

AIREFH

—

µA

IVREFH0

Waiting for 12-bit A/D conversion

(unit 0)

—

0.07

0.5

—

0.07

0.6

IVREFH0

12-bit A/D converter in module stop

mode (unit 0)

—

0.07

0.4

—

0.07

0.5

IVREFH0

USB

operating

current

Low speed

USB0

ICCUSBLS

—

3.7

6.5

—

3.7

6.5

VCC_USB

Full speed

USB0

ICCUSBFS

—

4.2

—

4.2

VCC_USB

RAM retension voltage

VRAM

2.7

—

2.7

—

VCC rising gradient

SrVCC

8.4

—

20000

8.4

—

20000 µs/V

VCC falling gradient*2

SfVCC

8.4

—

8.4

—

µs/V

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