CMV300 datasheet(12/56 Pages) AMSOSRAM

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Reference:CMV300-datasheet-v2.11

CMV300 Datasheet

Page 10 of 54

SENSOR ARCHITECTURE

Active pixel area

480 rows

2 dark reference rows on top/bottom

640 columns

2 dark reference columns on left

2 test columns on right

Analog front end (AFE)

(gain, offset, ADCs)

LVDS block

(drivers, multiplexers)

2 or 1 output(s)

sequencer

SPI & PLL

Temp

sensor

Input clock

SPI signals

External driving

signals

Pixel (0,0)

Pixel (4095,3071)

Analog front end (AFE)

(gain, offset, ADCs)

LVDS block

(drivers, multiplexers)

2 or 1 output(s)

FIGURE 2: SENSOR BLOCK DIAGRAM

Figure 2 shows the image sensor architecture. The internal sequencer generates the necessary signals for image

acquisition. The image is stored in the pixel (global shutter) and is then read out sequentially, row-by-row. On the pixel

output, an analog gain is possible. The pixel values then passes to a column ADC cell, in which ADC conversion is

performed. The digital signals are then read out over multiple LVDS channels or one parallel CMOS output. Each LVDS

channel reads out 324 adjacent columns of the array. Two rows are being read out at the same time when 4 LVDS

channels are used. In the Y-direction, rows of interest are selected through a row-decoder which allows a flexible

windowing. Control registers are foreseen for the programming of the sensor. These register parameters are uploaded

via a four-wire SPI interface. A temperature sensor which can be read out over the SPI interface is also included.

2.1 PIXEL ARRAY

The pixel array consists of 648 x 488 square global shutter pixels with a pitch of 7.4µm (7.4μm x 7.4μm). The pixels are

designed to achieve maximum sensitivity with low noise and low PLS specifications. Micro lenses are placed on top of

the pixels for improved fill factor and quantum efficiency (>50%). There are 4 dark reference rows available on the

sensor (rows 0, 1, 486 and 487) and 2 dark reference columns (column 0 and 1). Columns 646 and 647 are test columns

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