RA4E1 datasheet(76/81 Pages) RENESAS

76 / 81 page

Note:

This applies to the number of cycles when access from the CPU does not conflict with the instruction fetching to the

external memory or bus access from other bus masters such as DTC or DMAC.

Table A3.2

Access cycles (1 of 3)

Peripherals

Address

Number of access cycles

ICLK = PCLK

ICLK > PCLK*1

Cycle

Unit

Related function

From

Read

Write

Read

Write

RMPU, TZF,

SRAM, BUS,

DMACn, DMA,

DTC, ICU

0x4000_0000

0x4000_6FFF

ICLK

Renesas Memory

Protection Unit,

TrustZone Filter,

SRAM Control,

BUS Control, Direct

memory access

controller n, DMAC

Module Activation,

DTC Control Register,

Interrupt Controller

CPSCU, DBG,

FCACHE

0x4000_8000

0x4001_CFFF

ICLK

CPU System Security

Control Unit, Debug

Function, Flash Cache

SYSC

0x4001_E000

0x4001_E3FF

ICLK

System Control

SYSC

0x4001_E400

0x4001_E5FF

5 to 8

PCLKB

System Control

PORTn, PFS

0x4008_0000

0x4008_0FFF

2 to 5

2 to 4

PCLKB

Port n Control

Registers, Pmn Pin

Function Control

ELC, RTC, IWDT,

WDT, CAC

0x4008_2000

0x4008_3FFF

3 to 5

2 to 4

PCLKB

Event Link

Controller, Realtime

Clock, Independent

Watchdog Timer,

Watchdog

Timer, Clock

Frequency Accuracy

Measurement Circuit

MSTP

0x4008_4000

0x4008_4FFF

2 to 5

2 to 4

PCLKB

Module Stop Control

POEG

0x4008_A000

0x4008_AFFF

3 to 5

2 to 4

PCLKB

Port Output Enable

Module for GPT

USBFS

0x4009_0000

0x4009_03FF

3 to 6

3 to 5

PCLKB

USB 2.0 FS Module

USBFS

0x4009_0400

0x4009_04FF

1 to 4

1 to 3

PCLKB

USB 2.0 FS Module

IICn, IIC0WU

0x4009_2000

0x4009_FFFF

2 to 5

2 to 4

PCLKB

Inter-Integrated Circuit

n, Inter-Integrated

Circuit 0 Wake-up Unit

CANn

0x400A_8000

0x400A_9FFF

2 to 5

2 to 4

PCLKB

CANn Module

PSCU

0x400E_0000

0x400E_0FFF

2 to 5

2 to 4

PCLKB

Peripheral Security

Control Unit

AGTn

0x400E_8000

0x400E_8FFF

5 to 7

2 to 4

PCLKB

Low Power

Asynchronous

General purpose

Timer n

CRC, DOC

0x4010_8000

0x4010_9FFF

2 to 5

2 to 4

PCLKA

CRC Calculator, Data

Operation Circuit

SCIn

0x4011_8000

0x4011_8FFF

5*2

4*2

2 to 5*2

2 to 4*2

PCLKA

Serial Communication

Interface n

SPIn

0x4011_A000

0x4011_AFFF

5*3

4*3

2 to 5*3

2 to 4*3

PCLKA

Serial Peripheral

Interface n

SCE9

0x4016_1000

0x4016_1FFF

3 to 6

2 to 4

PCLKA

Secure Cryptographic

Engine

GPT32n, GPT16n,

GPT_OPS

0x4016_9000

0x4016_9FFF

4 to 7

2 to 4

PCLKA

General PWM 32-Bit

Timer n, General

PWM 16-Bit Timer

n, Output Phase

Switching Controller

ADC12n, DAC12

0x4017_0000

0x4017_2FFF

2 to 5

2 to 4

PCLKA

12bit A/D Converter n,

12-bit D/A converter

RA4E1 Datasheet

Appendix 3. I/O Registers

R01DS0391EJ0130 Rev.1.30

Jun 6, 2025

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