IMXRT1160AXEC datasheet(12/130 Pages) NXP

12 / 130 page

i.MX RT1160 Crossover Processors Data Sheet for Extended Industrial Products, Rev. 4, 06/2025

NXP Semiconductors

Modules list

CCM

GPC

PGMC

PMU

SRC

Clock Control Module,

General Power Controller,

Power Manage Unit,

Power Gating and

Memory Controller,

System Reset Controller

Clocks, Resets, and

Power Control

These modules are responsible for clock and reset

distribution in the system, and also for the system power

management.

CSI

Parallel CSI

Multimedia

Peripherals

The CSI IP provides parallel CSI standard camera

interface port. The CSI parallel data ports are up to 24

bits. It is designed to support 24-bit RGB888/YUV444,

CCIR656 video interface, 8-bit YCbCr, YUV or RGB,

and 8-bit/10-bit/16-bit/24-bit Bayer data input.

CWT

Code Watchdog Timer

Timer peripherals The CWT provides mechanisms for detecting

side-channel attacks and the execution of unexpected

instruction sequences.

DAC

Digital-Analog-Converter

Analog

The DAC is a 12-bit general purpose digital to analog

converter.

DAP

Debug Access Port

System Control

Peripherals

The DAP provides real-time access for the debugger

without halting the core to:

• System memory and peripheral registers

• All debug configuration registers

The DAP also provides debugger access to JTAG scan

chains. The DAP module is internal to the Cortex-M7

Core Platform.

DCDC

DCDC Converter

Analog

The DCDC module is used for generating power supply

for core logic. Main features are:

• Adjustable high efficiency regulator

• Two outputs: 1.0 V and 1.8 V

• Over current and over voltage detection

eDMA

eDMA_LPSR

enhanced Direct Memory

Access

System Control

Peripherals

There are two enhanced DMAs (eDMA).

• The eDMA is a 32-channel DMA engine, which is

capable of performing complex data transfers with

minimal intervention from a host processor.

• The DMA_MUX is capable of multiplexing up to 128

DMA request sources to the 32 DMA channels of

eDMA.

eLCDIF

LCD interface

Multimedia

Peripherals

The enhanced LCD controller provides flexible display

options and to drive a wide range of display devices

varying in size and capability. Major features are:

• Up to WXGA 60 Hz

• 8/16/18/24 bit LCD data bus support available

depending on I/O mux options.

• Programmable timing and parameters for LCD

interfaces to support a wide variety of displays.

• Index color with 256 entry x 24-bit color LUT

EMV SIM1

EMV SIM2

Europay, Master and Visa

Subscriber Identification

Module

Connectivity

Peripherals

EMV SIM is designed to facilitate communication to

Smart Cards compatible to the EMV version 4.3

standard (Book 1) and Smart Cards compatible with

ISO/IEC 7816-3 standard.

Table 3. i.MX RT1160 modules list (continued)

Block Mnemonic

Block Name

Subsystem

Brief Description

IMXRT1160AXEC датащи(PDF) 12 Page - NXP Semiconductors

IMXRT1160AXEC датащи(HTML) 12 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL