operation, a new value must be written to the pointer register. This transaction is accomplished by issuing a

target address byte with the R/W bit low, followed by the pointer register byte; no additional data are required.

The controller can then generate a start condition and send the target address byte with the R/W bit high to

initiate the read command; see Figure 7-7 for details of this sequence.

If repeated reads from the same register are desired, continually sending the pointer register bytes is not

necessary because the TMP461-EP retains the pointer register value until the value is changed by the next write

operation. The register bytes are sent MSB first, followed by the LSB.

Terminate read operations by issuing a not-acknowledge command at the end of the last byte to be read. For a

single-byte operation, the controller must leave the SDA line high during the acknowledge time of the first byte

that is read from the target.

7.5.1.5 Timeout Function

The TMP461-EP device resets the serial interface if either SCL or SDA is held low for 25ms (typical) between a

start and stop condition. If the TMP461-EP device is holding the bus low, the device releases the bus and waits

for a start condition. To avoid activating the timeout function, maintaining a communication speed of at least

1kHz for the SCL operating frequency is necessary.

7.5.1.6 High-Speed Mode

For the two-wire bus to operate at frequencies above 1MHz, the controller device must issue a high-speed mode

(HS-mode) controller code (0000 1xxx) as the first byte after a start condition to switch the bus to high-speed

operation. The TMP461-EP device does not acknowledge this byte, but switches the input filters on SDA and

SCL and the output filter on SDA to operate in HS-mode, thus allowing transfers at up to 2.17MHz. After the

HS-mode controller code is issued, the controller transmits a two-wire target address to initiate a data transfer

operation. The bus continues to operate in HS-mode until a stop condition occurs on the bus. Upon receiving the

stop condition, the TMP461-EP device switches the input and output filters back to fast mode operation.

7.5.2 General-Call Reset

The TMP461-EP device supports reset using the two-wire general-call address 00h (0000 0000b). The TMP461-

EP device acknowledges the general-call address and responds to the second byte. If the second byte is 06h

(0000 0110b), the TMP461-EP device executes a software reset. This software reset restores the power-on

reset state to all TMP461-EP registers and aborts any conversion in progress. The TMP461-EP device takes no

action in response to other values in the second byte.

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TMP461-EP

SNIS241 – SEPTEMBER 2025

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