ADA4356ABCZ datasheet(54/61 Pages) AD

54 / 61 page

Data Sheet

ADA4356

analog.com

Rev. 0

54 of 61

REG.

(HEX)

NAME

BIT 7

(MSB)

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

(LSB)

DEFAULT

VALUE

(HEX)

COMMENTS

pattern

2MSB.

0x21

Serial output

data control

(global)

LVDS

outpu

t: 0 =

MSB

first

(defau

lt),

1 =

LSB

first

SDR/DDR 1-lane/2-lane, bit

wise/byte wise, Bits[6:4]:

000 = SDR 2-lane, bit wise,

001 = SDR 2-lane, byte wise,

010 = DDR 2-lane, bit wise,

011 = DDR 2-lane, byte wise

(default),

100 = DDR 1-lane, word wise

Encode

mode:

0 = normal

encode

rate mode

(default),

1 = low

encode

mode for

sample

rate of

<20MSPS

0 = 1×

frame

(defaul

t),

1 = 2×

frame

Serial output

number of bits:

00 = 16 bits

(default),

10 = 12 bits

0x30

Serial

stream

control.

Sample rate

of <20MSPS

requires

that

Bits[6:4] =

100 (DDR 1-

lane) and Bit

3 = 1 (low

encode

mode).

0x22

Serial channel

status (local)

Open

Chann

output

reset

Channel

power-

down

0x00

Used to

power down

individual

sections of a

converter.

0x100

Resolution/sa

mple rate

override

Open

Resolu

tion/sa

mple

rate

overri

enable

Resolution:

01 = 14 bits

10 = 12 bits

Open

Sample rate:

000 = 20MSPS,

001 = 40MSPS,

010 = 50MSPS,

011 = 65MSPS,

100 = 80MSPS,

101 = 105MSPS,

110 = 125MSPS

0x00

Resolution/s

ample rate

override

(requires

writing to

the transfer

0xFF).

0x101

User

input/output

control

Open

SDIO

pull-do

0x00

Disables

SDIO pull-

down.

Memory Map Register Descriptions

For more details on registers not described herein, and for general details on the functions controlled in Register

0x00 to Register 0xFF, refer to the Application Note AN-877: Interfacing to High Speed ADCs via SPI.

Chip ID (Register 0x01)

The power-on default value of this register is 0x8B.

Device Index (Register 0x05)

The power-on default value of this register is 0x33.

Bits[7:6]—Open

Bit 5—Clock Channel DCO

Bit 5 is used to select the output DCO clock channel.

Bit 4—Clock Channel FCO

Bit 4 is used to select the output FCO clock channel.

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