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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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LP5569ARTWR датащи(PDF) 57 Page - Texas Instruments |
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LP5569ARTWR датащи(HTML) 57 Page - Texas Instruments |
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57 / 93 page  57 LP5569 www.ti.com SNVSAP8A – JULY 2017 – REVISED SEPTEMBER 2017 Product Folder Links: LP5569 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated Table 49. ENGINE3_PC Register Field Descriptions Bit Field Type Reset Description 7–0 engine3_pc R/W 0h Program counter starting value for program execution engine 3. 8.6.1.35 MISC2 Register (Address = 33h) [reset = 2h] MISC2 is shown in Figure 61 and described in Table 50. Return to Summary Table. Miscellaneous Register 2 Figure 61. MISC2 Register 7 6 5 4 3 2 1 0 RESERVED led_short_test led_open_test led_headroom cp_dis_disch R/W-0h R/W-0h R/W-0h R/W-1h R/W-0h Table 50. MISC2 Register Field Descriptions Bit Field Type Reset Description 7–5 RESERVED R/W 0h Reserved 4 led_short_test R/W 0h 0 = LED-short test disabled (default) 1 = LED-short test enabled 3 led_open_test R/W 0h 0 = LED-open test disabled (default) 1 = LED-open test enabled 2–1 led_headroom R/W 1h Selectable low-headroom comparator settings: 00 = 200 mV 01 = 250 mV (default) 10 = 300 mV 11 = 250 mV 0 cp_dis_disch R/W 0h Charge pump discharge disable. 0 = discharging is enabled in shutdown and standby states, absent of TSD. (default) 1 = discharging is disabled 8.6.1.36 ENGINE_STATUS Register (Address = 3Ch) [reset = 80h] ENGINE_STATUS is shown in Figure 62 and described in Table 51. Return to Summary Table. Engine Status Register Figure 62. ENGINE_STATUS Register 7 6 5 4 3 2 1 0 mask_busy startup_busy engine_busy RESERVED ch3_int ch2_int ch1_int R/W-1h R-0h R-0h R-0h R-0h R-0h R-0h Table 51. ENGINE_STATUS Register Field Descriptions Bit Field Type Reset Description 7 mask_busy R/W 1h Mask bit for interrupts generated by START-UP_BUSY or ENGINE_BUSY. 0 = External interrupt is generated when START-UP_BUSY or ENGINE_BUSY condition is no longer true. 1 = Interrupt events are masked (no external interrupt generated by START-UP_BUSY or ENGINE_BUSY). Reading register 3Ch clears the status bits and releases the INT pin to the high state. |
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