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LP5569ARTWR датащи(PDF) 34 Page - Texas Instruments |
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LP5569ARTWR датащи(HTML) 34 Page - Texas Instruments |
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34 / 93 page ![]() 34 LP5569 SNVSAP8A – JULY 2017 – REVISED SEPTEMBER 2017 www.ti.com Product Folder Links: LP5569 Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated (1) This opcode is used with numerical operands. (2) This opcode is used with variables. (3) X means don't care. (4) This is a new instruction, not available in LP5523 or LP55231. Table 12. LP5569 Branch Instructions INST. Bit [15] Bit [14] Bit [13] Bit [12] Bit [11] Bit [10] Bit [9] Bit [8] Bit [7] Bit [6] Bit [5] Bit [4] Bit [3] Bit [2] Bit [1] Bit [0] rst 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 branch(1) 1 0 1 loop count step number branch(2) 1 0 0 0 0 1 1 step number loop count int 1 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 end 1 1 0 int reset 0 0 0 0 0 0 0 0 0 0 0 trigger 1 1 1 wait for trigger send a trigger 0 ext trig X(3) X(3) E3 E2 E1 ext trig X(3) X(3) E3 E2 E1 trig_clear (4) 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 jne 1 0 0 0 1 0 0 Number of instructions to be skipped if the operation returns true variable 1 variable 2 jl 1 0 0 0 1 0 1 Number of instructions to be skipped if the operation returns true variable 1 variable 2 jge 1 0 0 0 1 1 0 Number of instructions to be skipped if the operation returns true variable 1 variable 2 je 1 0 0 0 1 1 1 Number of instructions to be skipped if the operation returns true variable 1 variable 2 (1) Valid for numerical operands. (2) Valid for variables. NAME VALUE (d) DESCRIPTION loop count(1) 0–63 The number of loops to be done. 0 means an infinite loop. step number 0–127 The step number to be loaded to program counter. loop count(2) 0–3 Selects the variable for loop count value. Loop count is loaded with the value of the variable defined below. 0 = Local variable A 1 = Local variable B 2 = Global variable C 3 = Global variable D 8.5.2.6.2 INT Send an interrupt to the processor by pulling the INT pin down and setting the corresponding status bit high. Interrupts can be cleared by reading the interrupt bits in the ENGINE_STATUS register at address 3Ch. 8.5.2.6.3 RST The rst instruction resets the program counter register (address 30h, 31h, or 32h) and continues executing the program from the program the start address defined in register addresses 4Bh–4Dh. The instruction takes 16 32 ‑kHz clock cycles. Note that default value for all program memory registers is 0000h, which is the rst instruction. 8.5.2.6.4 END End program execution. The instruction takes 16 32-kHz clock cycles. |
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