DAC80504 datasheet(34/50 Pages) TI2

34 / 50 page

DAC80504, DAC70504, DAC60504

SBAS871C – AUGUST 2017 – REVISED JANUARY 2019

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Product Folder Links: DAC80504 DAC70504 DAC60504

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8.6.5 GAIN Register (address = 0x04) [reset = 0x---]

Figure 69. GAIN Register

Reserved

REFDIV-EN

—

R/W

Reserved

BUFF3-GAIN

BUFF2-GAIN

BUFF1-GAIN

BUFF0-GAIN

—

R/W

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 13. GAIN Register Field Descriptions

Bit

Field

Type

Reset

Description

15:9

Reserved

—

Reserved for factory use.

REFDIV-EN

R/W

0/1

When set to 1 the reference voltage is internally divided by a

factor of 2.

When cleared to 0 the reference voltage is unaffected.

Default value is determined by the REFDIV pin.

7:4

Reserved

—

0000

Reserved for factory use

BUFF3-GAIN

R/W

0/1

When set to 1 the buffer amplifier for corresponding DAC has a

gain of 2.

When cleared to 0 the buffer amplifier for corresponding DAC

has a gain of 1.

Default value is determined by the GAIN pin.

BUFF2-GAIN

R/W

0/1

BUFF1-GAIN

R/W

0/1

BUFF0-GAIN

R/W

0/1

8.6.6 TRIGGER Register (address = 0x05) [reset = 0x0000]

Figure 70. TRIGGER Register

Reserved

LDAC

SOFT-RESET[3:0]

—

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 14. TRIGGER Register Field Descriptions

Bit

Field

Type

Reset

Description

15:5

Reserved

—

Reserved for factory use.

LDAC

Set this bit to 1 to synchronously load those DACs that have

been set in synchronous mode in the SYNC register.

3:0

SOFT-RESET[3:0]

0x0

When set to the reserved code 1010 resets the device to its

default state.

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