LM5064PMHSLASHNOPB datasheet(24/64 Pages) TI2

24 / 64 page

VCC

UVLO/EN

OVLO

VEE

2.48V

2.47V

TIMER AND GATE

LOGIC CONTROL

LM5064

20 PA

21 PA

VSYS

LM5064

SNVS718E – JUNE 2011 – REVISED FEBRUARY 2013

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Option A: The configuration shown in Figure 10 requires three resistors (R1-R3) to set the thresholds.

Figure 10. UVLO and OVLO Thresholds Set By R1-R3

The procedure to calculate the resistor values is as follows:

- Choose the upper UVLO threshold (VUVH), and the lower UVLO threshold (VUVL).

- Choose the upper OVLO threshold (VOVH).

- The lower OVLO threshold (VOVL) cannot be chosen in advance in this case, but is determined after the values

for R1-R3 are determined. If VOVL must be accurately defined in addition to the other three thresholds, see

Option B below. The resistors are calculated as follows:

(11)

(12)

(13)

The lower OVLO threshold is calculated from:

(14)

As an example, assume the application requires the following thresholds: VUVH = 36V, VUVL = 32V, VOVH = 60V.

(15)

(16)

(17)

Using standard values of R1 = 200 k

Ω, R2 = 8.87 kΩ, and R3 = 7.87 kΩ, the lower OVLO threshold calculates to

56V, and the OVLO hysteresis is 4.4V. Note that the OVLO hysteresis is always slightly greater than the UVLO

hysteresis in this configuration. When the R1-R3 resistor values are known, the threshold voltages and

hysteresis are calculated from the following:

(18)

(19)

VUV(HYS) = R1 x 20 µA

(20)

(21)

(22)

VOV(HYS) = (R1 + R2) x 21 µA

(23)

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