PCF8545ATTSLASHA datasheet(31/72 Pages) NXP

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PCF8545

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Product data sheet

Rev. 1 — 13 November 2013

31 of 72

NXP Semiconductors

PCF8545

Universal LCD driver for multiplex rates up to 1:8

When display data is transmitted to the PCF8545, the display bytes received are stored in

the display RAM in accordance with the selected LCD multiplex drive mode. The data is

stored as it arrives and depending on the current multiplex drive mode, data is stored in

quadruples, sextuples or bytes.

8.9.1 Data pointer

The addressing mechanism for the display RAM is realized using the data pointer. This

allows the loading of an individual display data byte, or a series of display data bytes, into

any location of the display RAM. The sequence commences with the initialization of the

data pointer by the load-data-pointer command (see Table 19).

Following this command, an arriving data byte is stored starting at the display RAM

address indicated by the data pointer.

The data pointer is automatically incremented in accordance with the chosen LCD

multiplex drive mode configuration. That is, after each byte is stored, the contents of the

data pointer are incremented

• by two (1:4 multiplex drive mode),

• by one or two (1:6 multiplex drive mode),

• by one (1:8 multiplex drive mode).

Multiplex drive 1:6 is a special case and is described later on.

When the address counter reaches the end of the RAM, it stops incrementing after the last

byte is transmitted. Redundant bits of the last byte and subsequent bytes transmitted are

discarded until the pointer is reset. To send new RAM data, the data pointer must be reset.

If an I2C-bus or SPI-bus data access is terminated early, then the state of the data pointer

is unknown. The data pointer must then be rewritten before further RAM accesses.

8.9.2 RAM filling in 1:4 multiplex drive mode

In the 1:4 multiplex drive mode the RAM is organized in four rows and 44 columns. The

eight transmitted data bits are placed in two successive display RAM columns of four rows

(see Figure 20). In order to fill the whole four RAM rows, 22 bytes need to be sent to the

PCF8545. After the last byte sent, the data pointer must be reset before the next RAM

content update. Additional data bytes sent and any data bits that spill over the RAM are

discarded.

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