PCF8545ATTSLASHA datasheet(16/72 Pages) NXP

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PCF8545

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Product data sheet

Rev. 1 — 13 November 2013

16 of 72

NXP Semiconductors

PCF8545

Universal LCD driver for multiplex rates up to 1:8

[1]

Default value.

Remark: Data pointer values outside of the valid range are ignored and no RAM content

is transferred until a valid data pointer value is set.

Filling of the display RAM is described in Section 8.9.

8.1.9 Command: write-RAM-data

This command initiates the transfer of data to the display RAM. Data is written into the

address defined by the load-data-pointer command. RAM filling is described in

Section 8.9.

[1]

For this command to be effective bit RS[1:0] of the control byte has to be set logic 01, see Table 25 on

page 36.

8.2 Start-up and shut-down

8.2.1 Reset and Power-On Reset (POR)

After a reset and at power-on the PCF8545 resets to starting conditions as follows:

1. The display is disabled.

2. All backplane outputs are set to VSS.

3. All segment outputs are set to VSS.

4. Selected drive mode is: 1:8 with 1⁄4 bias.

5. The data pointers are cleared (set logic 0).

6. RAM data is not initialized. Its content can be considered to be random.

7. The internal oscillator is running; no clock signal is available on pin OSCCLK; pin

OSCCLK is in 3-state.

The reset state is as shown in Table 21.

Table 19.

Load-data-pointer - load data pointer command bit description

Bit

Symbol

Value

Description

7 to 6

fixed value

Multiplex drive mode 1:8

5 to 0

DP[5:0]

000000[1] to

100111

6-bit binary value of 0 to 39

Multiplex drive mode 1:6

5 to 0

DP[5:0]

000000[1] to

101001

6-bit binary value of 0 to 41

Multiplex drive mode 1:4

5 to 0

DP[5:0]

000000[1] to

101011

6-bit binary value of 0 to 43

Table 20.

Write-RAM-data - write RAM data command bit description[1]

Bit

Symbol

Value

Description

7 to 0

D[7:0]

00000000 to

11111111

writing data byte-wise to RAM

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