MP44019

– CRM/DCM MULTI-MODE PFC CONTROLLER WITH SECOND OVP

MP44019 Rev. 1.0

MonolithicPower.com

4

4/30/2021

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© 2021 MPS. All Rights Reserved.

PIN FUNCTIONS

Pin #

Name

Description

1

FB

Output voltage sense. The FB pin senses the output voltage through a resistor divider,

and compares the sensed voltage to the reference voltage (VREF) (typically 2.5V). This

allows the output voltage to be regulated. FB also integrates under-voltage protection (UVP)

and over-voltage protection (OVP), described below:

UVP: Pull the FB pin below 0.36V for a blanking time (tBL_UVP) of 55µs to shut down the IC,

or pull COMP down for the IC to enter low-supply current mode.

OVP: If the FB voltage (VFB) exceeds VFB_OVP (typically 2.7V) for a blanking time (tBL_OVP) of

22µs, the IC stops switching. The IC resumes switching when VFB drops back to 2.62V.

2

COMP

Error amplifier output. The compensation network is connected between the COMP pin

and GND. If the internal COMP voltage (VCOMPI) drops below VCOMPI_BOFF (typically 60mV),

switching stops with five soft-off pulses. As VCOMPI ramps up to VCOMPI_BON (typically 120mV),

switching resumes after five soft-on pulses.

3

MAINSIN

Mains voltage sense. MAINSIN is connected to the capacitor just after the rectifier bridge.

The rectifier voltage is scaled down by a resistor divider connected to MAINSIN. The voltage

on MAINSIN provides brown-in and brownout functions, and provides feed-forward

compensation for the COMP voltage.

If MAINSIN’s peak voltage exceeds VMAINS_BI (typically 1V), the device starts to switch with

COMP soft start-up.

If MAINSIN’s peak voltage remains below VMAINS_BO (typically 0.9V) for

tBO (typically 50ms), a brownout condition is confirmed. Then the PFC stops switching, and

COMP is pulled down to 0V.

4

ZCD/CS

Combined function with current sense and zero-current detection. The CS pin provides

monitoring for over-current protection (OCP) and over-current limiting (OCL). A lead-edge

blanking (LEB) time ensures that the CS pin does not mistrigger OCP or OCL. OCP and

OCL are described in greater detail below:

OCL: If CS exceeds VOCL (typically 0.5V) for an LEB time (tOCL_LEB) of 300ns, the IC stops

switching. OCL is cycle-by-cycle current limited.

OCP: If the CS voltage exceeds VOCP (typically 0.75V) for two consecutive 180µs restart

switching cycles, the OCP flag is triggered, and the IC stops switching. OCP is reset by an

auto-recovery timer (tOCP_R) of 80ms, or by a brown-in, brownout, or VCC under-voltage

lockout (UVLO) event.

A leading-edge blanking time (tZCD_LEB) of 0.3µs is inserted to filter out the noise ringing on

ZCD after the gate turns off. The positive voltage on ZCD must exceed VZCD_H (typically

0.75V), then drop below VZCD_L (typically 0.25V) for the next stroke. The valley switch must

wait for the end of the minimum period limit time or dead time extension control. The restart

timer generates a signal to turn on the MOSFET when ZCD is not detected for tZCD_TO

(typically 180µs) which starts to count when switching off.

5

OVP2

Second OVP function. If OVP2 exceeds VFB_OVP2 (typically 2.7V) for a blanking time of

tBL_OVP2 (typically 22µs), the IC stops switching. The IC resumes switching when OVP2 drops

to VFB_OVP2 - VFB_OVP2_HYS (typically 2.6V).

6

GND

Ground.

7

GATE

Gate driver output. The high output current of the gate driver can drive the power

MOSFET. If GATE is supplied with a high VCC, the high-level voltage of GATE is clamped

to 13V.

8

VCC

Supply voltage.

VCC supplies power to the IC’s signal path and the gate driver. Connect

a bypass capacitor from VCC to ground to reduce noise.