MP44019

– CRM/DCM MULTI-MODE PFC CONTROLLER WITH SECOND OVP

MP44019 Rev. 1.0

MonolithicPower.com

16

4/30/2021

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© 2021 MPS. All Rights Reserved.

Valley Switching

To minimize the switching loss, the MP44019

always achieves valley switching through zero-

current detection (ZCD) under any condition,

regardless of DCM or CRM. A leading edge

blanking time (tZCD_LEB, typically 0.3µs) is inserted

to filter out the noise on ZCD after the gate turns

off.

The positive voltage on ZCD must exceed VZCD_H

(typically 0.75V) then drop below VZCD_L (typically

0.25V) for the next trigger condition. Besides the

ZCD trigger condition, the actual turn-on action

should also wait for the end of the dead time

extension (DTE) signal (see the Frequency

Reduction function below for more details).

When the DTE signal ends, and the conditions

to trigger ZCD are fulfilled, the controller

switches on the MOSFET after a delay time

(tZCD_DELAY, typically 150ns) at the minimum

drain-source voltage.

The auxiliary winding turn ratio is determined by

a sufficient positive voltage. VAUX_MIN can be

estimated with Equation (2):

������������������������_������������������ =

1

2

× (

������������������������−√2×������������������_������������������

������

− ������������) ≥ ������ZCD_H (2)

Where VF is the forward voltage of DZ (typically

0.7V). The winding ratio (N) can then be

calculated with Equation (3):

N ≤

������������������������−√2×������������������_������������������

2������ZCD_H+������������

(3)

Where VAC_MAX is the input’s maximum RMS

voltage.

A restart timer-out (tZCD_TO, typically 180µs)

generates a signal to turn on the MOSFET after

it switches off. This allows the MOSFET to turn

on during start-up, since no valley signal can be

detected on ZCD.

Figure 4 shows the internal function block, as

well as its peripheral circuit.

LEB time

300ns

0.5V

+

-

OCL

PWM

0.75V

+

-

LEB Time

250ns

R

S Q

Consecutive

Count = 3

OCP

GATE

RZCD

RG

RCS

L1

R4

R

S

Q

0.75V

0.25V

LEB

Restart =

180µs

RAMP

SOFF

Q

+

-

+

-

STOP

ZCD/CS

VCOMPD

tON_MAX =

30µs

DT

PWM

PWM

SOFF

DZ

OCP

OCP

Timer

=50ms

UVLO

Figure 4: ZCD Functional Block

Figure 5 shows the ZCD timing diagram.

IL

tSMIN

tON

GATE

ZCD/CS

ZCD

LEB

ZCD

Detect.

COMP

Ramp

LEB

VDS

LEB

0.75V

0.25V

Figure 5: ZCD Timing Diagram

Frequency Reduction Function

The MP44019 reduces the switching frequency

with DTE technology under light loads. The

MP44019 works in CrM under heavy loads. In

CrM, the PFC

’s frequency increases as the load

is decreased, which means the switching loss

becomes dominant. The MP44019 gradually

inserts a dead time (tD) as the load becomes

lighter.

Figure 6 shows how the dead time is extended

when the COMP voltage drops.