MP44019

– CRM/DCM MULTI-MODE PFC CONTROLLER WITH SECOND OVP

MP44019 Rev. 1.0

MonolithicPower.com

22

4/30/2021

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© 2021 MPS. All Rights Reserved.

The capacitor should be chosen so that the hold-

up time satisfies the relationship calculated with

Equation (33):

COUT =

2∙POUT×tHOLDUP

η×(VOUT

2

-VO_HOLDUP

2

)

(33)

Where VOUT is the minimum output voltage under

all normal operating conditions, and VO_HOLDUP is

the required minimum operating output voltage

to supply the downstream DC/DC converter

when the line voltage is shut down. The

maximum voltage at the output is a combination

of the output voltage, output voltage ripple, and

OVP threshold. Therefore, the voltage rating of

the capacitor must exceed this maximum output

voltage under the worst-case conditions.

In this example design, an aluminum electrolytic

capacitor with a specification of 450V/180µF is

recommended.

Control Circuit Design

The VCC Pin

If an external VCC power supply is not used,

initiate start-up by connecting a start-up resistor

to the input AC voltage. As the VCC capacitor

’s

charge rises above the turn-on threshold through

the start-up resistor, the IC begins to work.

The MP44019 requires a minimum 40µA start-up

current when VCC is 9.5V.

The start-up

resistance can be calculated with Equation (34):

RSTARTUP ≤

√2xVAC_MIN-9.5

ISTARTUP

= 2.9MΩ

(34)

Since the start-up resistor causes a voltage drop

between the input AC voltage and the supply

voltage of the chip, use a resistor with a higher

resistance to minimize the power consumption.

The FB Pin

VOUT can be set by connecting resistors to the FB

pin.

Output

voltage

regulation

accuracy

degrades with higher-value resistors due to the

effect of the FB bias current. Ensure that the FB

bias

current

degrades

the

output

voltage

regulation by less than 1%. Calculate the upper

voltage resistor divider value with Equation (35):

RO_UPPER ≤ 1%x

VOUT

IO_BIAS

= 40MΩ

(35)

Considering

the

power

consumption,

it

is

recommended to use three 3.3M

Ω resistors in

series for the FB upper voltage resistor divider.

The lower voltage resistor divider value can be

calculated with Equation (36):

RO_LOWER =

VR

VOUT-VR

xRO_UPPER = 62.3kΩ

(36)

The MAINSIN Pin

The MAINSIN voltage range (as related to the

VAC range) is between 1V and 3.38V. In this case,

a voltage of 85VAC can be set as the brown-in

voltage. The MAINSIN voltage divider can be

calculated with Equation (37):

RI_LOWER

RI_LOWER+RI_UPPER

=

VMAINS_BI

VAC_MIN

=

1

120

(37)

Considering the power consumption, a higher-

value resistor is recommended. In this scenario,

it is recommended to place three 3.3M

Ω

resistors in series for the MAINSIN upper voltage

resistor divider.

The lower voltage resistor divider value can be

calculated with Equation (38):

RI_LOWER =

RI_UPPER

120-1

= 83.2kΩ

(38)

The ZCD/CS Pin

The ZCD/CS pin provides a current-sense

function as well as zero-current detection (ZCD).

Figure 14 shows the ZCD/CS pin connection.

RZCD

RCS

L1

R4

ZCD/CS

DZ

A

Figure 14: ZCD/CS connection

CS is used for OCP and OCL. The current

flowing through the MOSFET should be below

the over-current limit threshold. The current-

sense resistor on the CS pin can be calculated

with Equation (39):

RCS≤

VOCL

2×√2×IAC_MAX

=58mΩ

(39)