ACT88430 datasheet(47/74 Pages) QORVO

47 / 74 page

Data Sheet Rev. G, August 2021 | Subject to change without notice

47 of 74

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ACT88430

Advanced PMU for Microcontrollers and Solid State Drive Applications

EXT_EN

The EXT_EN pin is functional with CMI 101. Connect to the enable signal of an external power supply.

nRESET

nRESET is not functional with CMI 101. Leave nRESET floating.

nRESET_AUX1

The nRESET_AUX1 pin is programmed as a digital input. The nRESET_AUX1 input should default L when power is

applied to the IC. When nRESET_AUX1 = H, Buck1, Buck2, and Buck3 turn on. When nRESET_AUX1 = L, these

outputs turn off. Note that PWREN must be H before nRESET_AUX1 is pulled high.

nRESET_AUX2

The nRESET_AUX2 pin is not functional with CMI 101. Leave the nRESET_AUX2 pin floating.

EXT_PG

The EXT_PG pin is not functional with CMI 101. Leave the EXT_PG pin floating.

MODE

The MODE pin must be tied to ground.

GPIO

GPIO is the DVS control input. When GPIO = H, the VSET0 register controls the buck converter output voltages. When

GPIO = L the VSET1 register controls the buck converter output voltages. Note that the default VSET0 and VSET1

settings are the same for each buck converter except Buck4. Buck 4 operates at 1.2V in ACTIVE mode and at 1.1V

when DVS is activated.

Buck1/2/3 Voltage Setting

Buck1/2/3 reference voltage is 0.6V. This sets the allowable voltage range between 0.6V to 3.000V in 9.375mV steps.

LDO1/3 Voltage Setting

The LDO1/3 reference voltage is 0.8V. This sets the allowable voltage range between 2.0V to 3.575V in 25mV steps.

LDO2 Voltage Setting

The LDO2 reference voltage is 0.6V. This sets the allowable voltage range between 0.8V to 2.375V in 25mV steps.

Device ID

The CMI 101 Device ID (register 0x7Dh) = 0x01h

I2C Address

The CMI 101 7-bit I2C address is 0x53h. This results in 0xA6h for a write address and 0xA7h for a read address.

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