ACT88430 datasheet(31/74 Pages) QORVO

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Data Sheet Rev. G, August 2021 | Subject to change without notice

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ACT88430

Advanced PMU for Microcontrollers and Solid State Drive Applications

the UVLO threshold, the IC is turned off and nRESET is

held low. When the input voltage goes above UVLO, the

IC transitions to the ACTIVE state and starts up normally.

The UVLO thresholds are determined by the operating

range that is programmed by the VIN_FULL_RANGE

and VIN_LVO registers. See Table 2 for these settings.

Input Voltage OV

The ACT88430 monitors its input voltage at the VIN pin

for an OV condition. When the input voltage is above

the OV threshold, the IC outputs turn off and nRESET

asserts low. When the input voltage goes below OV, the

IC transitions back to the ACTIVE state and starts up

normally. The OV thresholds are determined by the

operating

range

that

programmed

the

VIN_FULL_RANGE and VIN_LVO registers. See Table

2 for these settings.

Output Under/Over Voltage

The ACT88430 monitors the output voltages for under

voltage and over voltage conditions. If one output enters

an UV/OV fault condition, the IC shuts down all outputs

for 100ms and restarts with the programmed power up

sequence. If an output is in current limit, it is possible

that its voltage can drop below the UV threshold which

also shuts down all outputs. If that behavior is not

desired, mask the appropriate fault bit. Each output still

provides its real-time UV/OV fault status via its fault

flag, even if the fault is masked. Masking an OV/UV

fault just prevents the fault from being reported via the

IRQ pin. A UV/OV fault condition pulls the nRESETx

pins low. Note that nRESETx pins are configurable via

CMI settings.

Output Current Limit

The ACT88430 incorporates a three level overcurrent

protection scheme for the buck converters and a single

level scheme for the LDOs. For the buck converters, the

overcurrent current threshold refers to the peak switch

current. The first protection level is when a buck

converter’s peak switch current reaches 80% of the

Cycle-by-Cycle current limit threshold for greater than

16 switching cycles. Under this condition, the IC reports

the fault via the appropriate fault flag bit. If the fault is

unmasked, it asserts the IRQ pin. This may or may not

turn off that output or other outputs depending on the

specific CMI. The next level is when the current

increases to the Cycle-by-Cycle threshold. The buck

converter limits the peak switch current in each

switching cycle. This reduces the effective duty cycle

and causes the output voltage to drop, potentially

creating

undervoltage

condition.

When

the

overcurrent condition results in an UV condition, and UV

is not masked, the IC turns off all supplies off for 100ms

and restarts. The third level is when the peak switch

current reaches 120% of the Cycle-by-Cycle current

limit threshold. This immediately shuts down the

regulator and waits 14ms before restarting.

For LDOs, the overcurrent thresholds are set by each

LDO’s Output Current Limit setting. When the output

current reaches the Current Limit threshold, the LDO

limits the output current. This reduces the output

voltage, creating an undervoltage condition, causing all

supplies to turn off for 100ms before restarting.

The overcurrent fault limits for each output are

adjustable via I2C. Overcurrent fault reporting can be

masked via I2C, but the overcurrent limits are always

active and will shut down the IC when exceeded.

Thermal Warning and Thermal Shutdown

The ACT88430 monitors its internal die temperature

and reports a warning via IRQ when the temperature

rises above the Thermal Interrupt Threshold of typically

135 deg C. It reports a fault when the temperature rises

above the Thermal Shutdown Temperature of typically

165 deg C. A temperature fault shuts down all outputs

unless the fault is masked. Both the fault and the

warning can be masked via I2C. The temperature

warning and fault flags still provide real-time status even

if the faults are masked. Masking just prevents the faults

from being reported via the IRQ pin.

Pin Descriptions

The ACT88430 input and output pins are configurable

via CMI configurations. The following descriptions are

refer to the most common pin functions. Refer to the

CMI Options section in the back of the datasheet for

specific pin functionality for each CMI.

PWREN

The PWREN pin controls the IC’s SLEEP state. When

I2C bit PWREN_MODE = 0, the PWREN pin moves the

IC between the SLEEP and ACTIVE states.

PWREN must be enabled via the PWRDN_EN I2C bit

after power up. PWREN is ignored if the PWRDN_EN

bit is low. The PWREN polarity is controlled by the

PWREN_POL I2C bit. PWREN is active low when

PWREN_POL

high,

and

active

high

when

PWREN_POL is low. The host processor can read the

PWREN status via I2C in the PWREN_STAT I2C bit.

PWREN is referenced to the VIO_IN pin, and is 5.5V

tolerant meaning that PWREN can go to 5.5V even if

VIO_IN is less than 5.5V. PWREN has a 10us

bidirectional filter to prevent noise from triggering

unwanted operation.

EXT_PG

The EXT_PG pin is a dual-purpose input. Note that

EXT_PG can only be configured as an input. It functions

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