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ACT88430 датащи(PDF) 36 Page - Qorvo, Inc

номер детали ACT88430
подробное описание детали  Advanced PMU for Microcontrollers and Solid State Drive Applications
PDF  74 Pages
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производитель  QORVO [Qorvo, Inc]
домашняя страница  https://www.qorvo.com/
Logo QORVO - Qorvo, Inc

ACT88430 датащи(HTML) 36 Page - Qorvo, Inc

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Data Sheet Rev. G, August 2021 | Subject to change without notice
36 of 74
www.qorvo.com
© 2020 Qorvo US, Inc. All rights reserved. Confidential
ACT88430
Advanced PMU for Microcontrollers and Solid State Drive Applications
®
and optimize transient performance over their full
operating range. No compensation design is required;
simply follow a few simple guide lines described below
when choosing external components.
Minimum On-Time
The ACT88430 minimum on-time is 120ns. If the
calculated on-time is less than 120ns with 2.25MHz
operation, then the user must configure the output to
switch at 1.125MHz. Setting I2C bits Bx_HalfFreq = 0
sets Fsw = 2.25MHz. Setting Bx_HalfFreq = 1 sets Fsw
= 1.125MHz. The following equation calculates the on-
time.
������������������������������������= ������������������������������������������������
������������������������������������∗������������������������������������
Where Vout is the output voltage, Vin is the input voltage,
and FSW is the switching frequency.
BUCK1 Bypass Switch
The ACT88430 provides a bypass mode for 3.3V
systems. This allows the 3.3V input voltage to power the
ACT88430 regulators and also be sequenced to the
downstream loads. In bypass mode, the Buck1 P-ch
FET acts as a switch and the N-ch FET is disabled. The
bypass switch turns on the 3.3V rail with the
programmed delay and softstart time.
In bypass mode, the ACT88430 I2C registers are
reconfigured to the following.
1.
B1_PWR_GOOD register bit reconfigured to
the output of the Soft Start ramp. When soft
start is complete, this bit goes high to allow the
sequencing of the other regulators to continue.
B1_PWR_GOOD no longer reports the Buck1
output voltage status. It stays high as long as
the bypass switch is enabled.
2.
B1_ILIM bit is the output of the internal PMOS
Current Detection circuit. This is set to 3A
typical. If the bypass current exceeds the
Internal PMOS Current Detection current,
B1_ILIM triggers an IRQ output and gets
latched in the ILIM_REG[0] if configured by the
IRQ_nMASK. The B1_ILIM can also be masked
with the B1_ILIM_FLTMSK register.
B1_UV register bit reconfigured to the output of the
Internal PMOS Current Shutdown circuit. This is set to
6A typical. If the bypass switch current exceeds 6A,
limits the current which triggers an under voltage fault
condition and moves the IC into the OVUVFLT state.
This immediately shuts down all regulators including the
bypass switch. The system restarts in 100ms, following
the programmed startup sequencing. This fault can be
masked with I2C bit UV_nMASK. This fault is latched in
the UV_REG I2C bit. Shutdown due to overcurrent can
also be masked via the I2C bit B1_PG_FLTMSK.
B1_OV is disabled. There is no overvoltage detection
circuitry on the output of the bypass switch.
Input Capacitor Selection
Each regulator requires a high quality, low-ESR,
ceramic input capacitor. Note that even though each
buck converter has separate input pins, all input pins
must be connected to the same voltage potential. 10uF
capacitors are typically suitable, but this value can
be increased without limit. Smaller capacitor values
can be used with lighter output loads. Choose the input
capacitor value to keep the input voltage ripple less
than 50mV.
Vripple=������������������������������������������������∗������������������������������������������������������������������������������������∗�1−�������������������������������������������������������������������������������������
������������������������������������∗������������������������������������
Be sure to consider the capacitor’s DC bias effects and
maximum ripple current rating when using capacitors
smaller than 0805.
A capacitor’s actual capacitance is strongly affected by
its DC bias characteristics. The input capacitor is
typically an X5R, X7R, or similar dielectric. Use of Y5U,
Z5U, or similar dielectrics is not recommended. Input
capacitor placement is critical for proper operation.
Each buck’s input capacitor must be placed as close to
the IC as possible. The traces from VIN_Bx to the
capacitor and from the capacitor to PGNDx should as
short and wide as possible.
Inductor Selection
The Buck converters utilize current-mode control
and a proprietary internal compensation scheme to
simultaneously simplify external component selection
and optimize transient performance over their full
operating range. The ACT88430 is optimized for opera-
tion with 1.0-1.5
μH inductors. Choose an inductor with
a low DC-resistance, and avoid inductor saturation by
choosing inductors with DC ratings that exceed the
maximum output current by at least 30%. The following
equation calculates the inductor ripple current.
∆������������������������ =�1−�������������������������������������������������������������������������������������∗������������������������������������������������
������������������������������������∗������������
Where VOUT is the output voltage, VIN is the input voltage,
FSW is the switching frequency, and L is the inductor
value.
Output Capacitor Selection
The ACT88430 is designed to use small, low ESR,
ceramic output capacitors. Buck1 typically requires a
44uF output capacitor while Buck2, Buck3, and Buck4



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