ACT88430 datasheet(35/74 Pages) QORVO

35 / 74 page

Data Sheet Rev. G, August 2021 | Subject to change without notice

35 of 74

www.qorvo.com

ACT88430

Advanced PMU for Microcontrollers and Solid State Drive Applications

Bit

Setting

Range

Buck1

0x74h

SEL_REF0P

8_BUCK1

Output-

Low

Output-

High

Buck2

0x72h

SEL_REF0P

8_BUCK2

Output-

Low

Output-

High

Buck3

0x89h

SEL_REF0P

8_BUCK3

Output-

Low

Output-

High

Buck4

n/a

Output-

High

The programming range for Output-Low is 0.6V to

3.000V in 9.375mV steps.

VBUCKx = 0.6V + VOUTx * 0.009375V

Where VOUTx is the decimal equivalent of the value

in each regulator’s I2C VOUTx register. The VOUTx

registers contain an unsigned 8-bit binary value. As an

example,

Buck

1’s

VOUT0

contains

10000000b (128 decimal), the output voltage is 1.8V.

The programming range for Output-High is 0.8V to

3.988V in 12.5mV steps.

VBUCKx = 0.8V + VOUTx * 0.0125V

Where VOUTx is the decimal equivalent of the value

in each regulator’s I2C VOUTx register. The VOUTx

registers contain an unsigned 8-bit binary value. As an

example,

Buck

1’s

VOUT0

contains

01010000b (80 decimal), the output voltage is 1.8V.

Qorvo recommends that a buck converter’s output volt-

age be kept within +/- 25% of the default output

voltage to maintain accuracy. Voltage changes larger

than +/- 25% may require different factory trim settings

(new CMI) to maintain accuracy.

100% Duty Cycle Operation

The buck regulators are capable of operating at up to

100% duty cycle. During 100% duty cycle operation, the

high-side power MOSFETs are held on continuously,

providing a direct connection from the input to the output

(through the inductor), ensuring the lowest possible

dropout voltage in battery powered applications.

Dynamic Voltage Scaling

Each buck converter supports Dynamic Voltage Scaling

(DVS). DVS allows the user to optimize the processor’s

energy to complete tasks by lowering the processor’s

operating frequency and input voltage when lower

performance is acceptable. In normal operation, each

output regulates to the voltage programmed in the I2C

to Bx_VSET1. The output transitions from Bx_VSET0

to Bx_VSET1 at a rate determined by the output

capacitance and the load current. The outputs transition

between VSET1 and VSET0 by the rate determined by

the I2C bits SLEW.

For fault free operation, the user must ensure output

load conditions plus the current required to charge

the output capacitance during a DVS rising voltage

condition does not exceed the current limit setting of the

regulator. As with any power supply, changing an output

voltage too fast can require a current higher than the

current limit setting. The user must ensure that the

voltage step, slew rate, and load current conditions do

not result in an instantaneous loading that results in a

current limit condition.

Enter DVS by programming register 0x00h bit1

(DVS_EN) = 1 and then pulling the EXT_EN pin high.

Note that some CMI configurations may not require

DVS_EN = 1 and may use different input pins.

Bx_VSET0

must

higher

than

Bx_VSET1.

PWR_GOOD, OV, and ILIM are automatically masked

during DVS transitions to avoid asserting nRESET.

Optimizing Noise

Each buck converter contains several features available

via I2C to further optimize functionality. The top P-ch

FET’s turn-on timing can be shifted 100ns from the

master clock edge via the PHASE_DELAY I2C bit. It can

also be aligned to the rising or falling clock edge via the

PHASE I2C bit. The internal FET rise and fall times can

be optimized to minimize switching noise at the cost of

lower efficiency via the DRVADJ I2C bit.

Overcurrent and Short Circuit Protection

Each buck converter provides overcurrent and short

circuit protection. Overcurrent protection is achieved

with cycle-by-cycle current limiting. The peak current

threshold is set by the Bx_ILIM I2C bits. If the peak

current reaches the programmed threshold for 16

consecutive switching cycles, the IC asserts IRQ low. A

short circuit condition that results in the peak switch

current being 122% of Bx_ILIMSET immediately shuts

down all supplies, asserts IRQ low and restarts the

system in 100ms. If a buck converter reaches

overcurrent or short circuit protection, the status is

reported in the ILIM_REG[x] I2C registers. The contents

of these registers are latched until read via I2C.

Overcurrent and short circuit conditions can be masked

via the I2C bit Bx_ILIM_FLTMSK.

Compensation

The buck converters utilize current-mode control

and a proprietary internal compensation scheme to

simultaneously simplify external component selection

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