TUSB1044AI datasheet(7/66 Pages) TI1

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5.5 Electrical Characteristics

over operating free-air temperature and voltage range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Power

PUSB-

ACTIVE

Average power when configured for USB

3.2x1 only mode.

Link in U0 with GEN2 data

transmission; EQ control pins = NC;

K28.5 pattern at 10Gbps; VID = 1000mVp-

p; VOD Linearity = 900mVp-p; CTL1 = L;

CTL0 = H

297

PUSB-DP-

ACTIVE

Average power when configured for USB

3.2x1 and 2 lane DP.

Link in U0 with GEN2 data transmission

and DP active; EQ control pins = NC;

K28.5 pattern at 10Gbps; VID = 1000mVp-

p; VOD Linearity = 900mVp-p; CTL1 = H;

CTL0 = H

578

PCUSTOM-

ACTIVE

Average power when configured for USB

3.2x2

Link in U0 with GEN2 data

transmission; EQ control pins = NC;

K28.5 pattern at 10Gbps; VID = 1000mVp-

p; VOD Linearity = 900mVp-p;

578

PCUSTOM-

ACTIVE

Average power when configured for USB

3.2x1 and 2 channel custom alt mode.

Link in U0 with GEN2 data transmission

and custom alt mode active; EQ control

pins = NC; K28.5 pattern at 10Gbps; VID

= 1000mVp-p; VOD Linearity = 900mVp-

p; CTL1 = H; CTL0 = H

578

P4DP-

ACTIVE

Average power when configured for Four

DP lanes

Four active DP lanes; EQ control pins

= NC; K28.5 pattern at 10Gbps; VID =

1000mVp-p; VOD Linearity = 900mVp-

p; CTL1 = H; CTL0 = L

564

PUSB-NC

Average power when configured for

USB3.2x1 only and nothing connected to

TXP/N pins.

No USB device connected; CTL1 = L;

CTL0 = H

2.5

PUSB-

U2U3

Average power when configured for

USB3.2x1 only and link in U2 or U3 state.

Link in U2 or U3 state; CTL1 = L; CTL0 =

PSHUTDO

Average power when device in Shutdown CTL1 = L; CTL0 = L; I2C_EN = 0;

0.65

4-State CMOS Inputs(UEQ[1:0];DEQ[1:0], CFG[1:0], A[1:0], I2C_EN, VIO_SEL)

IIH

High-level input current

VCC = 3.6V; VIN = 3.6V

µA

IIL

Low-level input current

VCC = 3.6V; VIN = 0V

–160

–40

µA

4-Level

VTH

Threshold 0 / R

VCC = 3.3V

0.55

Threshold R/ Float

VCC = 3.3V

1.65

Threshold Float / 1

VCC = 3.3V

2.7

RPU

Internal pullup resistance

kΩ

RPD

Internal pulldown resistance

kΩ

2-State CMOS Input (CTL0, CTL1, FLIP, HPDIN, SLP_S0#, SWAP, DIR[1:0]).

VIH-3.3V

High-level input voltage

VCC = 3.3V; VIO_SEL = "0" or "R";

3.6

VIL-3.3V

Low-level input voltage

VCC = 3.3V; VIO_SEL = "0" or "R";

0.8

VIH-1.8V

High-level input voltage

VCC = 3.3V; VIO_SEL = "F" or "1";

1.2

3.6

VIL-1.8V

Low-level input voltage

VCC = 3.3V; VIO_SEL = "F" or "1";

0.4

RPD_CTL1

Internal pulldown resistance for CTL1,

CTL0, DIR0, DIR1, FLIP, SLP_S0#

500

kΩ

RPD_HPDI

Internal pulldown resistance for HPDIN

400

kΩ

RPD_SWA

Internal pulldown resistance for SWAP

200

kΩ

IIH

High-level input current

VIN = 3.6V

–25

µA

IIL

Low-level input current

VIN = GND, VCC = 3.6V

–25

µA

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TUSB1044A

SLLSG07 – MARCH 2025

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