TUSB1044AI datasheet(41/66 Pages) TI1

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Table 8-5. General_3 Register Field Descriptions (continued)

Bit

Field

Type

Reset

Description

5-2

VOD_DCGAIN_SEL

R/W

This field selects the VOD linearity range and DC gain for all the

channels and in all directions. When VOD_DCGAIN_OVERRIDE =

0b, this field reflects the sampled state of CFG[1:0] pins. When

VOD_DCGAIN_OVERRIDE = 1b, software can change the VOD

linearity range and DC gain for all the channels and in all directions

based on the value written to this field. Each CFG is a 2-bit value.

The register-to-CFG1/0 mapping is: [5:2] = {CFG1[1:0], CFG0[1:0]}

where CFGx[1:0] mapping is:

0h = 0

1h = R

2h = F

3h = 1

1-0

DIR_SEL

R/W

Sets the operation mode. If this field is 2h or 3h and CTLSEL[1:0] is

3h, then device functions as USB3.2 x2.

0h = USB + DP Alt Mode Source

1h = USB + DP Alt Mode Sink.

2h = USB + Custom or USB3.2x2 source

3h = USB + Custom or USB3.2x2 Sink.

8.1.4 UFP2_EQ Register (Offset = 10h) [Reset = 00h]

UFP2_EQ is shown in Table 8-6.

Return to the Summary Table.

Table 8-6. UFP2_EQ Register Field Descriptions

Bit

Field

Type

Reset

Description

7-4

UTX2EQ_SEL

R/W

Field selects the EQ for the UTX2P/N pins. When EQ_OVERRIDE

= 0b, this field reflects the sampled state of UEQ[1:0] pins. When

EQ_OVERRIDE = 1b, the software can change the EQ setting for

the UTX2P/N pins based on the value written to this field.

3-0

URX2EQ_SEL

R/W

Field selects the EQ for the URX2P/N pins. When EQ_OVERRIDE

= 0b, this field reflects the sampled state of UEQ[1:0] pins. When

EQ_OVERRIDE = 1b, the software can change the EQ setting for

the URX2P/N pins based on the value written to this field.

8.1.5 UFP1_EQ Register (Offset = 11h) [Reset = 00h]

UFP1_EQ is shown in Table 8-7.

Return to the Summary Table.

Table 8-7. UFP1_EQ Register Field Descriptions

Bit

Field

Type

Reset

Description

7-4

UTX1EQ_SEL

R/W

Field selects the EQ for the UTX1P/N pins. When EQ_OVERRIDE

= 0b, this field reflects the sampled state of UEQ[1:0] pins. When

EQ_OVERRIDE = 1b, the software can change the EQ setting for

the UTX1P/N pins based on the value written to this field.

3-0

URX1EQ_SEL

R/W

Field selects the EQ for the URX1P/N pins. When EQ_OVERRIDE

= 0b, this field reflects the sampled state of UEQ[1:0] pins. When

EQ_OVERRIDE = 1b, the software can change the EQ setting for

the URX1P/N pins based on the value written to this field.

8.1.6 DisplayPort_1 Register (Offset = 12h) [Reset = 00h]

DisplayPort_1 is shown in Table 8-8.

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TUSB1044A

SLLSG07 – MARCH 2025

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