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TUSB1044AI датащи(PDF) 44 Page - Texas Instruments |
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TUSB1044AI датащи(HTML) 44 Page - Texas Instruments |
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44 / 66 page ![]() Table 8-12. USB3_MISC Register Field Descriptions (continued) Bit Field Type Reset Description 5 U2U3_LFPS_DEBOUNCE R/W 0h Controls whether or not incoming LFPS is debounced or not. 0h = No debounce of LFPS before U2/U3 exit. 1h = 200us debounce of LFPS before U2/U3 exit. 4 DISABLE_U2U3_RXDET R/W 0h Controls whether or not Rx.Detect is performed in U2/U3 state. 0h = Rx.Detect in U2/U3 enabled. 1h = Rx.Detect in U2/U3 disabled. 3-2 DFP_RXDET_INTERVAL R/W 1h This field controls the Rx.Detect interval for the downstream facing port (DTX1P/N and DTX2P/N). 0h = 8ms 1h = 12ms 2h = Reserved 3h = Reserved. 1-0 USB_COMPLIANCE_CTR L R/W 0h Controls whether compliance mode is determined by FSM or register. 0h = Compliance mode determined by FSM. 1h = Compliance mode enabled in DFP direction. 2h = Compliance mode enabled in UFP direction. 3h = Compliance mode disabled. 8.1.11 USB3_LOS Register (Offset = 23h) [Reset = 23h] USB3_LOS is shown in Table 8-13. Return to the Summary Table. Table 8-13. USB3_LOS Register Field Descriptions Bit Field Type Reset Description 7 VCM_LFPS_WAIT R/W 0h Add delay for TX VCM to settle before passing LFPS 0h = Enable 1h = Disable 6 RESERVED R 0h Reserved 5-3 CFG_LOS_HYST R/W 4h Controls LOS hysteresis defined as 20 log (LOS deassert threshold/LOS assert threshold). 0h = 0.15dB 1h = 0.85dB 2h = 1.45dB 3h = 2.00dB 4h = 2.70dB 5h = 3.00dB 6h = 3.40dB 7h = 3.80dB 2-0 CFG_LOS_VTH R/W 3h Controls LOS assert threshold voltage 0h = 67mV 1h = 72mV 2h = 79mV 3h = 85mV 4h = 91mV 5h = 97mV 6h = 105mV 7h = 112mV TUSB1044A SLLSG07 – MARCH 2025 www.ti.com 44 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: TUSB1044A |
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