TMP86FS28DFG datasheet(166/272 Pages) TOSHIBA

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Page 154

11. Synchronous Serial Interface (SIO)

11.3 Serial clock

TMP86FS28DFG

11.3.1.1 Internal clock

Any of six frequencies can be selected. The serial clock is output to the outside on the SCK pin. The

SCK pin goes high when transfer starts.

When data writing (in the transmit mode) or reading (in the receive mode or the transmit/receive mode)

cannot keep up with the serial clock rate, there is a wait function that automatically stops the serial clock

and holds the next shift operation until the read/write processing is completed.

Note: 1 Kbit = 1024 bit (fc = 16 MHz, fs = 32.768 kHz)

Figure 11-3 Automatic Wait Function (at 4-bit transmit mode)

11.3.1.2 External clock

An external clock connected to the SCK pin is used as the serial clock. In this case, output latch of this

port should be set to "1". To ensure shifting, a pulse width of at least 4 machine cycles is required. This

pulse is needed for the shift operation to execute certainly. Actually, there is necessary processing time for

interrupting, writing, and reading. The minimum pulse is determined by setting the mode and the pro-

gram. Therfore, maximum transfer frequency will be 488.3K bit/sec (at fc=16MHz).

Figure 11-4 External clock pulse width

Table 11-1 Serial Clock Rate

NORMAL1/2, IDLE1/2 mode

SLOW1/2,

SLEEP1/2 mode

DV7CK = 0

DV7CK = 1

SCK

Clock

Baud Rate

Clock

Baud Rate

Clock

Baud Rate

000

fc/213

1.91 Kbps

fs/25

1024 bps

fs/25

1024 bps

001

fc/28

61.04 Kbps

fc/28

61.04 Kbps

010

fc/27

122.07 Kbps

fc/27

122.07 Kbps

011

fc/26

244.14 Kbps

fc/26

244.14 Kbps

100

fc/25

488.28 Kbps

fc/25

488.28 Kbps

101

fc/24

976.56 Kbps

fc/24

976.56 Kbps

110

111

External

pin (output)

Written transmit

data

Automatically

wait function

SCK

tSCKL tSCKH

tcyc = 4/fc (In the NORMAL1/2, IDLE1/2 modes)

4/fs (In the SLOW1/2, SLEEP1/2 modes)

tSCKL, tSCKH > 4tcyc

SCK

pin (Output)

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