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TMP86FS28DFG датащи(PDF) 79 Page - Toshiba Semiconductor

номер детали TMP86FS28DFG
подробное описание детали  8 Bit Microcontroller
PDF  272 Pages
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производитель  TOSHIBA [Toshiba Semiconductor]
домашняя страница  http://www.semicon.toshiba.co.jp/eng
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TMP86FS28DFG датащи(HTML) 79 Page - Toshiba Semiconductor

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Page 67
TMP86FS28DFG
5.8 Port P7 (P70 to P77)
Port P7 is an 8-bit input/output port that can also be used for LCD segment output.
A reset initializes the output latch (P7DR) to “1”, the Pch control (P7OUTCR) to “0”, and the LCD output control
register (P7LCR) to “0”.
To use a pin in Port P7 as an input port, set P7DR to “1” and then set the corresponding bit in P7LCR and
P7OUTCR to “0”.
To use a pin in Port P7 as an LCD segment output, set the corresponding bit in P7LCR to “1”.
The output circuit of Port P7 can be set either as sink open-drain output (“0”) or CMOS output (“1”) individually
for each bit in P7OUTCR.
Port P7 has a separate data input register. The output latch state can be read from the P7DR register, and the pin
state can be read from the P7PRD register.
Note: An asterisk (*) indicates that either “1” or “0” can be set.
Figure 5-9 Port P7
Table 5-10 Register Programming for Port P7 (P70 to P77)
Function
Programmed Value
P7DR
P7OUTCR
P7LCR
Port input
“1”
“0”
“0”
Port “0” output
“0”
Set as
appropriate.
“0”
Port “1” output
“1”
“0”
LCD segment output
*
*
“1”
Data input (P7PRD)
Output latch read (P7DR)
STOP
OUTEN
P7OUTCRi input
Data output (P7DR)
P7OUTCRi
P7i
Note) i = 7~0
DQ
DQ
LCD data output
P7LCRi
DQ
P7LCRi input
Output latch



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