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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TMP86FS28DFG датащи(PDF) 57 Page - Toshiba Semiconductor |
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TMP86FS28DFG датащи(HTML) 57 Page - Toshiba Semiconductor |
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57 / 272 page  Page 45 TMP86FS28DFG 4. Special Function Register (SFR) The TMP86FS28DFG adopts the memory mapped I/O system, and all peripheral control and data transfers are performed through the special function register (SFR) or the data buffer register (DBR). The SFR is mapped on address 0000H to 003FH, DBR is mapped on address 0F00H to 0FFFH. This chapter shows the arrangement of the special function register (SFR) and data buffer register (DBR) for TMP86FS28DFG. 4.1 SFR Address Read Write 0000H P0DR 0001H P1DR 0002H P2DR 0003H P3DR 0004H P4DR 0005H P5DR 0006H P6DR 0007H P7DR 0008H P8DR 0009H TC3CR 000AH TC4CR 000BH TC5CR 000CH TC6CR 000DH Reserved 000EH Reserved 000FH Reserved 0010H TC10DRAL 0011H TC10DRAH 0012H TC10DRBL 0013H TC10DRBH 0014H TC10CR 0015H TTREG3 0016H TTREG4 0017H TTREG5 0018H TTREG6 0019H PWREG3 001AH PWREG4 001BH PWREG5 001CH PWREG6 001DH Reserved 001EH Reserved 001FH Reserved 0020H TC11DRAL 0021H TC11DRAH 0022H TC11DRBL 0023H TC11DRBH 0024H TC11CR 0025H Reserved |
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