TMPR3916 datasheet(96/225 Pages) TOSHIBA

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Chapter 3 Graphics Display Controller (GDC)

Preliminary

3-17

Horizontal Transfer Number Register (HTND) for layer D

Bit

Name



HTND



Bit

Name

Function

Reset

Value

R/W

31:21



Wired to zero

20:16

HTND

Line Size of Layer D

These specify the number of data transfers for one line. Sets the

number of display dots for one line divided by 32.

R/W

15:0



Wired to zero

Note:

HTND is always rounded to the higher integer value. It is for layer D only as layer D may

have a different size.

Horizontal Display Start/ End Register (HDSER) for layers A/E, B and C

Bit

2423

1615

Name



HDS



HDE

Bit

Name

Function

Reset

Value

R/W

31:24



Wired to zero

23:16

HDS

These specify the horizontal display start position using the number

of dot clocks, starting from the HSYNC* signal falling edge.

0x2D

R/W

15:10



Wired to zero

9:0

HDE

These specify the horizontal display end position using the number

of dot clocks, starting from the HSYNC* signal falling edge.

Number of dots displayed during one period = HDE – HDS

0x15D

R/W

Note:

The lowest value allowed for HDS and HDE is 2hex.

Due to internal data structures effective values are HDS+9 and HDE+8.

Horizontal Display Start/ End Register (HDSERD) for layer D

Bit

2423

1615

Name



HDSD



HDED

Bit

Name

Function

Reset

Value

R/W

31:26



Wired to zero

25:16

HDSD

These specify the horizontal display start position using the number

of dot clocks, starting from the HSYNC* signal falling edge.

0x2D

R/W

15:10



Wired to zero

9:0

HDED

These specify the horizontal display end position using the number

of dot clocks, starting from the HSYNC* signal falling edge.

Number of dots displayed during one period = HDED - HDSD

0x15D

R/W

Note:

The lowest value allowed for HDSD and HDED is 2hex.

Due to internal data structures effective values are HDS+9 and HDE+8.

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