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TMPR3916 датащи(PDF) 62 Page - Toshiba Semiconductor

номер детали TMPR3916
подробное описание детали  32-Bit TX System RISC TX39 Family TMPR3916
PDF  225 Pages
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производитель  TOSHIBA [Toshiba Semiconductor]
домашняя страница  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR3916 датащи(HTML) 62 Page - Toshiba Semiconductor

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Chapter 2 Memory Controller (MC)
Preliminary
2-13
Address Mask Register (DCAM)
Bit
31
22
21
16
Name
AMX
Bit
15
6
5
0
Name
AMY
Bit
Name
Function
Reset
Value
R/W
31:22
AMX
Address Mask Memory Channel X
This field is used to mask the base address for memory bank X.
1 = Bit is taken into account during comparison
0 = Bit is don’t care for the comparison
The base address mask is used to select the memory part of an
appropriate size. It is also possible to mirror DRAM memory parts or
to protect memory parts using this register.
0
R/W
21:16
Wired to zero
0R
15:6
AMY
Address Mask Memory Channels Y
The same as for memory channels X.
0
R/W
5:0
Wired to zero
0R
Timing Register (DCTR)
Bit
313029
282726252423
222120191817
16
Name
RFC
WRL
Bit
15
14
13
12
11
10
987
654321
0
Name
APL
RASL
CASL
PAL
ARL
Bit
Name
Function
Reset
Value
R/W
31:18
RFC
Refresh Counter Reload Value
This field provides the reload value for the internal refresh counter.
The refresh counter is implemented as a 14 bit down counter, which
reloads and issues a refresh request, every time a value of 0 is
reached.
This Settings depends on the specified refresh cycle time and
number of rows of the connected memory devices:
Register Value =
Rows
of
Number
Frequency
Operation
Time
fresh
Re
(Example settings at 60 MHz, counter values / settings in Hex)
Time
2 K Row
4 K Row
8 K Row
32 ms
0x03A9
0x01D4
0x00EA
64 ms
0x0752
0x03A9
0x01D4
128 ms
0x0EA4
0x0752
0x03A9
0x1000
R/W



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