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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ELANSC310 датащи(PDF) 110 Page - Advanced Micro Devices |
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ELANSC310 датащи(HTML) 110 Page - Advanced Micro Devices |
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110 / 119 page  110 Élan™SC310 Microcontroller Data Sheet PREL IMINARY Notes: 1. If the data bus is externally buffered and/or level translated, this write data hold time will be increased by the propagation delay through the buffer and/or the output disable delay of the buffer. These timings are based on default settings and required initial programming. These timings may be modified via the MMS Memory Wait State 1 Register, Index 62h, and the Command Delay Register, Index 60h. (See the ÉlanTMSC310 Microcontroller Programmer’s Reference Manual , order #20665.) Table 57. ISA Memory Read/Write 0 Wait State Cycle (See Figure 46) Symbol Parameter Description Notes Preliminary Units Min Max t1 LA stable to BALE inactive 60 ns t2 SA stable to command active 70 ns t3 BALE pulse width 35 ns t4 LA hold from BALE inactive 40 ns t5a SA hold from command inactive Write 0 ns t5b SA hold from command inactive Read 0 ns t6 BALE inactive to command active 30 ns t7 LA stable to MCS16 active 35 ns t8 Command pulse width 100 ns t9 Command active to 0WS active 0 20 ns t10 0WS hold from command inactive 40 ns t11 MCS16 hold from LA change 0 ns t12 RDDATA setup to command inactive 25 ns t13 RDDATA hold from command inactive 0 ns t14 WRDATA setup to command inactive 100 ns t15 WRDATA hold from command inactive 1 –1 ns |
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