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PCAL6408A

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Product data sheet

Rev. 3 — 18 September 2013

9 of 49

NXP Semiconductors

PCAL6408A

Low-voltage translating, 8-bit I2C-bus/SMBus I/O expander

7.4 Register descriptions

7.4.1 Input port register (00h)

The Input port register (register 0) reflects the incoming logic levels of the pins, regardless

of whether the pin is defined as an input or an output by the Configuration register. The

Input port register is read only; writes to this register have no effect. The default value ‘X’

is determined by the externally applied logic level. An Input port register read operation is

performed as described in Section 8.2 “Read commands”.

7.4.2 Output port register (01h)

The Output port register (register 1) shows the outgoing logic levels of the pins defined as

outputs by the Configuration register. Bit values in these registers have no effect on pins

defined as inputs. In turn, reads from this register reflect the value that was written to this

7.4.3 Polarity inversion register (02h)

The Polarity inversion register (register 2) allows polarity inversion of pins defined as

inputs by the Configuration register. If a bit in this register is set (written with ‘1’), the

corresponding port pin’s polarity is inverted. If a bit in this register is cleared (written with a

‘0’), the corresponding port pin’s original polarity is retained.

7.4.4 Configuration register (03h)

The Configuration register (register 3) configures the direction of the I/O pins. If a bit in this

bit in this register is cleared to 0, the corresponding port pin is enabled as an output.

Table 7.

Input port register (address 00h)

Bit

Symbol

Default

Table 8.

Output port register (address 01h)

Bit

Symbol

Default

Table 9.

Polarity inversion register (address 02h)

Bit

Symbol

Default

Table 10.

Configuration register (address 03h)

Bit

Symbol

Default

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