PM7375-SC datasheet(82/430 Pages) PMC

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PM7375 LASAR-155

DATA SHEET

PMC-931127

ISSUE 6

LOCAL ATM SAR & PHYSICAL LAYER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

9.14.4.1

Fig. 9.10 TDRF and TDRR Queues

T QB[31 :2 ] = T x Queue Bas e r egi s t er

T DRF QS [1 5 :0 ]

= T DR F r ee Queue S t ar t r egi s t er

T DRF QW[1 5 :0 ] = T DR F r ee Queue Wr i t e r egi s t er

T DRF QR[1 5 :0 ]

= T DR F r ee Queue Read r egi s t er

T DRF QE[1 5 :0 ]

= T DR F r ee Queue End r egi s t er

Transmit Descriptor Referance Queues

Base Address:

Index Registers:

Free:

T DRL RQS [1 5 :0 ] = T DR Ready L ow Queue S t ar t r egi s t er

T DRL RQW[1 5 :0 ] = T DR Ready L ow Queue Wr i t e r egi s t er

T DRL RQR[1 5 :0 ] = T DR Ready L ow Queue Read r egi s t er

T DRL RQE[1 5 :0 ] = T DR Ready L ow Queue End r egi s t er

High Priority Ready:

Low Priority Ready:

T DRHRQS [1 5 :0 ] = T DR Ready Hi gh Queue S t ar t r egi s t er

T DRHRQW[1 5 :0 ] = T DR Ready Hi gh Queue Wr i t e r egi s t er

T DRHRQR[1 5 :0 ] = T DR Ready Hi gh Queue Read r egi s t er

T DRHRQE[1 5 :0 ] = T DR Ready Hi gh Queue End r egi s t er

Base Address

+ Index Register

-------------------------

PCI Address

TQB[31:2]

Index[15:0]

AD[31:0]

T x Des cript or Reference Queue Memory Map

TDRHRQS

T DRHRQE

T DRHRQR

T DRHRQW

TDR

TQB

TDRL RQW

Bi t 0

Bi t 3 1

TDRF QS

TDRF QE

TDRF QR

TDRF QW

Stat us + T DR

T DRL RQS

TDRL RQE

TDRL RQR

TDR

Valid TDR. Only least

significant 16

bits are valid.

Stat us + T DR

256KB

TDR Reference Queues

PCI Host Memory

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