PM7375-SC datasheet(41/430 Pages) PMC

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PM7375 LASAR-155

DATA SHEET

PMC-931127

ISSUE 6

LOCAL ATM SAR & PHYSICAL LAYER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

C/BEB[0]

C/BEB[1]

C/BEB[2]

C/BEB[3]

I/O

The PCI bus command and byte enable (C/BEB[3:0])

bus contains the bus command or the byte valid

indications. During the first clock cycle of a

transaction, C/BEB[3:0] contains the bus command

code. For subsequent clock cycles, C/BEB[3:0]

identifies which bytes on the AD[31:0] bus carry

meaningful data. C/BEB[3] is associated with byte 3

(AD[31:24]) while C/BEB[0] is associated with byte 0

(AD[7:0]). When C/BEB[n] is high, the associated byte

is meaningless. When C/BEB[n] is low, the associated

byte is valid.

When the LASAR-155 is the initiator, C/BEB[3:0] are

outputs.

When the LASAR-155 is the target, C/BEB[3:0] are

inputs.

When the LASAR-155 is not involved in the current

transaction, C/BEB[3:0] are tri-stated.

C/BEB[3:0] are updated on the rising edge of PCICLK

or sampled using the rising edge of PCICLK

depending on whether they are outputs or inputs.

PAR

I/O

The parity (PAR) signal is the even parity calculated

over the 36 signals, AD[31:0] and C/BEB[3:0]

regardless of whether all the bytes of the AD bus are

meaningful. PAR always is the calculated parity for the

previous PCICLK cycle. Parity errors detected by the

LASAR-155 are indicated on output PERRB and in the

PCID Interrupt Status register.

When the LASAR-155 is the initiator, PAR is an output

for writes and an input for reads.

When the LASAR-155 is the target, PAR is an input for

writes and an output for reads.

When the LASAR-155 is not involved in the current

transaction, PAR is tri-stated.

PAR is updated on the rising edge of PCICLK or

sampled using the rising edge of PCICLK depending

on whether it is an output or an input.

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