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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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STAC9752 датащи(PDF) 78 Page - Integrated Device Technology |
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STAC9752 датащи(HTML) 78 Page - Integrated Device Technology |
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78 / 95 page  STAC9752/9753 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING IDT™ 78 STAC9752/9753 REV 3.3 1206 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING 8.4.12. High Pass Filter Bypass (78h) To unlock Register 78h, write 0xABBA to Register 76h. Default: 0000h Bit(s) Reset Value Name Description 15 0 EAPD EAPD data Enable EAPD data is output on the EAPD pin when bit D11 = 1 EAPD data is input on the EAPD pin when bit D11 = 0 14:12 0 Reserved Bits not used, should read back 0 11 1 EAPD_OEN EAPD Pin Enable 0 = EAPD configured as input pin 1 = EAPD configured as output pin 10:3 0 Reserved Bits not used, should read back 0 2 0 INTDIS Interrupt disable option. Interrupts cleared by writing a 1 to I4 (Reg24h:D15) 0 = Will clear both SENSE and GPIO interrupts 1 = Will only clear SENSE interrupts. GPIO interrupts will have to be cleared in Reg54h. 1 0 GPIOACC GPIO ACCESS 0 = ACLINK access from GPIO Pads 1 = ACLINK access from GPIO Register 54h 0 0 GPIOSLT12 0 = GPIO0/1 access via Reg 54h when GPIO is set as an output, for input, Slot 12 data will be 0h. 1 = GPIO0/1 access via Slot 12 when GPIO is set as an output, for inputs, Reg54h will not be updated. This can only be used if a modem CODEC is not present in the system and using Slot 12. D15 D14 D13 D12 D11 D10 D9 D8 RESERVED D7 D6 D5 D4 D3 D2 D1 D0 RESERVED ADC HPF BYP Bit(s) Reset Value Name Description 15:1 0 RESERVED Bits not used, should read back 0 0 0 ADC HPF BYP 0 = ADC High Pass Filter active, (Normal operation) 1 = ADC High Pass Filter Bypass |
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