STAC9752 datasheet(35/95 Pages) IDT

35 / 95 page

STAC9752/9753

TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING

IDT™

STAC9752/9753

REV 3.3 1206

TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING

AC-Link output frame slot 1 communicates control register address, and write/read command infor-

mation to the STAC9752/9753.

The first bit (MSB) sampled by AC‘97 indicates whether the current control transaction is a read or a

write operation. The following 7 bit positions communicate the targeted control register address. The

trailing 12 bit positions within the slot are reserved and must be stuffed with 0 by the AC‘97 Control-

ler.

5.3.3.

Slot 2: Command Data Port

The command data port is used to deliver 16-bit control register write data in the event that the cur-

rent command port operation is a write cycle (as indicated by Slot 1, bit 19).

•

Bit(19:4) Control Register Write Data (Stuffed with 0 if current operation is a read)

•

Bit(3:0) Reserved (Stuffed with 0)

If the current command port operation is a read then the entire slot time must be stuffed with 0 by the

AC‘97 Controller.

5.3.4.

Slot 3: PCM Playback Left Channel

AC-Link output frame slot 3 is the composite digital audio left playback stream. In a typical “Games

Compatible” PC this slot is composed of standard PCM (.wav) output samples digitally mixed (on the

AC‘97 Controller or host processor) with music synthesis output samples. If a sample stream of res-

olution less than 20-bits is transferred, the AC‘97 Controller must stuff all trailing non-valid bit posi-

tions within this time slot with 0.

The DAC can be assigned to slots 3&4, 6&9, 7&8, or 10&11.

5.3.5.

Slot 4: PCM Playback Right Channel

AC-Link output frame slot 4 is the composite digital audio right playback stream. In a typical “Games

Compatible” PC this slot is composed of standard PCM (.wav) output samples digitally mixed (on the

AC‘97 Controller or host processor) with music synthesis output samples. If a sample stream of res-

olution less than 20-bits is transferred, the AC‘97 Controller must stuff all trailing non-valid bit posi-

tions within this time slot with 0.

The DAC can be assigned to slots 3&4, 6&9, 7&8, or 10&11.

5.3.6.

Slot 5: Modem Line 1 Output Channel

Audio output frame slot 5 is reserved for modem operation and is not used by the STAC9752/9753.

5.3.7.

Slot 6 - 11: DAC

The DAC can be assigned to slots 3&4, 6&9, 7&8, or 10&11.

Table 8. Command Address Port Bit Assignments

Bit

Description

Comments

Read/Write command

1= read, 0 = write

18:12

Control Register Index

Sixty-four 16-bit locations, addressed on even byte boundaries

11:0

Reserved

Stuffed with 0

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