поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

Preview PDF HTML

PIC18F4685-I/SP датащи(PDF) 118 Page - Microchip Technology

номер детали PIC18F4685-I/SP
подробное описание детали  28/40/44-Pin Enhanced Flash Microcontrollers with ECAN Technology, 10-Bit A/D and nanoWatt Technology
PDF  484 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F4685-I/SP датащи(HTML) 118 Page - Microchip Technology

Back Button PIC18F4685-I/SP Datasheet HTML 114Page - Microchip Technology PIC18F4685-I/SP Datasheet HTML 115Page - Microchip Technology PIC18F4685-I/SP Datasheet HTML 116Page - Microchip Technology PIC18F4685-I/SP Datasheet HTML 117Page - Microchip Technology PIC18F4685-I/SP Datasheet HTML 118Page - Microchip Technology PIC18F4685-I/SP Datasheet HTML 119Page - Microchip Technology PIC18F4685-I/SP Datasheet HTML 120Page - Microchip Technology PIC18F4685-I/SP Datasheet HTML 121Page - Microchip Technology PIC18F4685-I/SP Datasheet HTML 122Page - Microchip Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 118 / 484 page
background image
PIC18F2682/2685/4682/4685
DS39761B-page 116
Preliminary
© 2007 Microchip Technology Inc.
REGISTER 9-2:
INTCON2: INTERRUPT CONTROL REGISTER 2
R/W-1
R/W-1
R/W-1
R/W-1
U-0
R/W-1
U-0
R/W-1
RBPU
INTEDG0
INTEDG1
INTEDG2
—TMR0IP
—RBIP
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
RBPU: PORTB Pull-up Enable bit
1
= All PORTB pull-ups are disabled
0
= PORTB pull-ups are enabled by individual port latch values
bit 6
INTEDG0: External Interrupt 0 Edge Select bit
1
= Interrupt on rising edge
0
= Interrupt on falling edge
bit 5
INTEDG1: External Interrupt 1 Edge Select bit
1
= Interrupt on rising edge
0
= Interrupt on falling edge
bit 4
INTEDG2: External Interrupt 2 Edge Select bit
1
= Interrupt on rising edge
0
= Interrupt on falling edge
bit 3
Unimplemented: Read as ‘0’
bit 2
TMR0IP: TMR0 Overflow Interrupt Priority bit
1
= High priority
0
= Low priority
bit 1
Unimplemented: Read as ‘0’
bit 0
RBIP: RB Port Change Interrupt Priority bit
1
= High priority
0
= Low priority
Note:
Interrupt flag bits are set when an interrupt condition occurs regardless of the state of its corresponding
enable bit or the global interrupt enable bit. User software should ensure the appropriate interrupt flag bits
are clear prior to enabling an interrupt. This feature allows for software polling.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com