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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SZF2002 датащи(PDF) 31 Page - NXP Semiconductors |
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SZF2002 датащи(HTML) 31 Page - NXP Semiconductors |
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31 / 76 page  1998 Aug 26 31 Philips Semiconductors Product specification Low voltage 8-bit microcontroller with 6-kbyte embedded RAM SZF2002 Table 25 Selection of the serial clock frequency (SCL) in a Master mode of operation 16.2 Serial Status Register (S1STA) S1STA is a read-only register. The contents of this register may be used as a vector to a service routine. This optimizes the response time of the software and consequently that of the I2C-bus. The status codes for all possible modes of the I2C-bus interface is given in Table 29. The register has only a valid vector to a service routine if the SI bit of the S1CON register is set, otherwise it is invalid, usually F8H. Table 26 Serial Status Register (SFR address D9H) Table 27 Description of S1STA bits Table 28 Symbols used in Table 29 CR2 CR1 CR0 fclk DIVISOR BIT RATE (kHz) AT fclk = 1 MHz 0 0 0 128 7.81 0 0 1 112 8.93 0 1 0 96 10.42 0 1 1 80 12.50 1 0 0 480 2.08 1 0 1 60 16.67 1 1 0 30 33.33 1 1 1 reserved − 76543210 SC4 SC3 SC2 SC1 SC0 0 0 0 BIT SYMBOL DESCRIPTION 3 to 7 SC4 to SC0 5-bit status code; see Table 29. 0to2 − These three bits are always zero. SYMBOL DESCRIPTION SLA 7-bit slave address R read bit W write bit ACK acknowledgement (acknowledge bit is logic 0) ACK no acknowledgement (acknowledge bit is logic 1) DATA data byte to or from I2C-bus MST master SLV slave TRX transmitter REC receiver |
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